LTC3447_15 Datasheet, PDF (6/16 Pages) Linear Technology – I2C Controllable Buck Regulator

LTC3447
PI FU CTIO S
V_OUT (Pin 1): Output Voltage Sensing Pin. An internal
resistor divider provides the divided down feedback refer-
ence for comparison.
GND (Pin 2): Ground for all Circuits Excluding the Internal
Synchronous Power NFET.
FB (Pin 3): Feedback Sensing Pin for the Optional External
Feedback Resistors. Must be tied to V_IN if there are no
external feedback resistors.
PGOOD (Pin 4): Fault Report. Open drain driver sinks cur-
rent when V_OUT is 10% out of tolerance. Blanking during
DAC changes can be enabled via the I²C.
V_IN (Pin 5): Main Supply Pin. Must be closely decoupled
to GND with a 2.2µF or greater capacitor.
SW (Pin 6): Switch Node Connector to Inductor. This pin
connects the drains of the internal main and synchronous
power MOSFET switches.
RUN (Pin 7): Run Control Input. Forcing pin above 1.5V
enables the part. Forcing the pin below 0.3V shuts down
the device. In shutdown, all functions are disabled draw-
ing <1µA of supply current. Do not leave the RUN pin
floating.
SCL (Pin 8): I²C Clock Input.
V_CCD (Pin 9): I²C Power Rail.
SDA (Pin 10): I²C Data Input.
Exposed Pad (Pin 11): Ground. Must be connected to
PCB ground for electrical contact and optimized thermal
performance.
BLOCK DIAGRA
V_IN
C_IN
RUN
V_CCD
SDA
SCL
PGOOD
6-BIT DAC
V_DAC
I²C
DAC
BURST
BLANK
LOAD
POWER
GOOD
REF
UV REF
OV REF
MUX
S
LTC3447
SLEW
SW
+
SOFT-START
BUCK
V_REF REGULATOR
–
BURST ^VFB
MUX
Figure 2. LTC3447 High Level Block Diagram
SW
1.3R
R
V_OUT
C_OUT
R1
FB
R2
DAC
3447 BD
3447f
6