LTC3816_15 Datasheet, PDF (38/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
APPLICATIONS INFORMATION
For the synchronous MOSFETs, assume that the two
bottom MOSFETs share the inductor current equally. The
power dissipation for one MOSFET is:
( ) ^{( ) P}_SYNC
=
V_IN
– V_OUT
V_IN
I_LOAD(MAX)
2
1+ δ R_DS(ON)
P_SYNC
=
12V – 0.75V
12V
(13.5A
)²
(1+
0.25)
2.8mΩ
= 0.598W
The total power dissipation of the bottom MOSFETs is
2 × 0.598W = 1.196W.
For this application, the maximum input RMS current
happens when V_IN = V_IN(MIN) and can be determined from
the formula:
I_RMS(MAX) ≈I_LOAD(MAX)
( ) ^V_OUT ^V_IN(MIN) ^{– V}_OUT
V_IN(MIN)
0.75V(5V – 0.75V)
I_RMS(MAX) ≈ 27A
5V
≈ 9.64A
The minimum RMS current rating of the input capacitor
must exceed 9.64A. To meet this ripple current requirement
with V_IN(MAX) = 24V, select two Sanyo OS-CON 25SVP56
capacitors or higher voltage rating capacitor as the input
supply bulk capacitance. In addition, place a couple of
high performance ceramic capacitors in parallel with the
bulk capacitors.
The output capacitor value is determined by:
(₍ ) _{) CBULK}
+ C_CER
=
L
2V_OUT
∆I_LOAD ²
∆V_OUT(LOAD)
Most regulator designs allow a slight transient overshoot
for a short duration. If this is limited to 40mV, we have:
( ) ^∆V_OUT(AVP) ^{= AVP • I}_LOAD(MAX) ^–I_LOAD(MIN)
=
3
mV
A
•
(27A
–
1.5A
)
=
76.5mV
∆V_OUT(LOAD) = ∆V_OUT(AVP) + ∆V_OVERSHOOT
= 76.5mV + 40mV = 116.5mV
C_BULK
+
C_CER
=
0.33µH(27A – 1.5A)²
2(0.75V)(116.5mV)
=
1228µF
The ESR of the output capacitor is determined by the load
transient requirement. If the output voltage jump due to
the capacitor ESR is limited to ∆V_OUT(AVP):
R_ESR
<
∆V_OUT(AVP)
∆I_LOAD
=
75mV
(27A – 1.5A)
=
2.94mΩ
The above requirements are easily satisfied by three
Sanyo POSCAP 2TPF330M6 330µF (ESR = 6mΩ) bulk
capacitors in parallel, twenty 10µF and some 1µF high
performance ceramic capacitors in the processor socket
cavity. With three bulk capacitors in parallel, the effective
ESR is 2mΩ, and the maximum steady-state output ripple
voltage is given by:
( ) ^
∆V_OUT
≈
∆I_L
^R_ESR

+
8
•
f_OSC
•
1
C_BULK + C_CER



=
5.5A

^2mΩ

+
8
•
400kHz
•
(3
•
1
330µF
+
20
•
10µF)



= 11mV+ 1.44mV = 12.44mV
3816f
38