LTC3816_15 Datasheet, PDF (11/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
Pin Functions (eTSSOP/QFN)
I_SENN (Pin 1/Pin 36): Current Sense Negative Input. Con-
nect this pin to the negative terminal of the current sense
resistor or the negative terminal of the inductor DCR
lowpass filter.
I_TCFB (Pin 2/Pin 37): Inductor DCR Temperature Compen-
sation Amplifer Feedback Input. To derive the temperature
compensated voltage dropped across the inductor DCR,
connect a resistor from the SW node to this pin. An NTC
network, in parallel with a capacitor, forms the feedback
path of this amplifier. For applications that use a discrete
resistor for current sensing, replace the NTC network
with a resistor.
I_TC (Pin 3/Pin 38): Inductor DCR Temperature Compen-
sation Amplifer Output. The I_MON circuitry and the error
amplifier obtain the temperature compensated DCR voltage
through this amplifier.
PREI_MON (Pin 4/Pin 1): I_MON Current Output Setting.
PREI_MON is servoed to the I_SENN potential. A resistor from
PRE_IMON to I_TC sets the I_MON output current. For the IMVP-6
configuration, connect this pin to INTV_CC.
I_MON (Pin 5/Pin 2): IMVP-6/IMVP-6.5 Configuration Selec-
tion and Output Current Monitor. Connect this pin to INTV_CC
to select the IMVP-6 configuration. At start-up, the switcher
V_OUT is ramped to 1.2V (V_BOOT). In deeper sleep mode,
the controller enables the slow V_OUT slew rate. Connect a
resistor to V_SS(SEN) to select the IMVP-6.5 configuration.
In this case, V_BOOT equals 1.1V, slow slew rate is disabled
and the I_MON current source is proportional to the load. In
the IMVP-6.5 configuration, this pin is internally clamped
to 1.1V with respect to the V_SS(SEN) pin.
RPTC (Pin 6/Pin 3): Nonlinear PTC Thermistor Input.
Connect to a nonlinear PTC thermistor for MOSFET or
inductor temperature sensing. This pin is pulled up by a
100µA current source. If the potential at RPTC is higher
than 0.47V, thermal flag VRTT# is pulled low. RPTC is
sensitive to noise pickup. Avoid coupling high frequency
switching signals to this pin. If required, bypass this
pin with a capacitor to GND.
VR_ON (Pin 7/Pin 4): Voltage Regulator Enable Input. The
VR_ON pin power-up threshold is 1.2V. When forced below
0.65V, a power-down sequence is initiated where the
V_CC(CORE) output is ramped down near 0V before the IC
is put into a low current shutdown mode. The VR_ON pin
has an internal 1µA pull-up current.
V_SS(SEN) (Pin 8/Pin 5): Processor V_CC(CORE) Negative
Terminal Voltage Sense. Negative input of the differential
sense amplifier. Connect to the processor V_SS(SEN) pin.
V_CC(SEN) (Pin 9/Pin 6): Processor V_CC(CORE) Positive
Terminal Voltage Sense. Positive input of the differential
sense amplifier. Connect to the processor V_CC(SEN) pin.
SERVO (Pin 10/Pin 7): Error Amplifier AC Input. The
controller servos the switcher output voltage to the VID
DAC voltage through the error amplifier.
V_FB (Pin 11/Pin 8): Error Amplifier Negative Input Pin.
V_FB is servoed to 1.3V.
COMP (Pin 12/Pin 9): Error Amplifier Output. The COMP
pin is connected directly to the error amplifier output and
the input of the line feedforward circuit. Use an RC network
between the COMP pin and the V_FB pin to compensate
the feedback loop for stability and optimum transient
response.
SS (Pin 13/Pin 10): Soft-Start Input. The SS pin has an
internal 1µA current source pull-up. A capacitor connected
to this pin controls the output voltage start-up. SS is
forced low if VR_ON or PWRGD is low, or if an overvoltage
or overcurrent fault occurs. If the potential at SS is less
than 0.3V, the I_MAX sourcing current is reduced to 2.5µA
and the current limit threshold is reduced to 25% of its
nominal value.
DPRSLPVR (Pin 14/Pin 11): Deeper Sleep Mode. For the
IMVP-6 configuration, 25µs after DPRSLPVR is asserted
high, the controller enables the V_OUT slow slew rate tran-
sition. To disable slow slew rate mode, force DPRSLPVR
low. Upon power-up, the DPRSLPVR input is ignored until
PWRGD is asserted.
3816f
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