LTC3816_15 Datasheet, PDF (33/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
APPLICATIONS INFORMATION
The resistive component of the bulk capacitor ESR must
be small enough that under a load release, ESR multiplied
by the change in load current must meet the following
criteria:
∆V_OUT(LOAD) > ∆I_LOAD • R_ESR
The ceramic capacitors at the regulator output help to
absorb some of the change in the load current and reduce
the ESR voltage step predicted by the above equation. High
performance ceramic capacitors also help to lower the
regulator output voltage perturbation caused by the high
slew rate change in the inductor current flowing through
the bulk capacitor parasitic ESL.
The total amount of output capacitance required is also
restricted by the steady-state output voltage ripple. The
output ripple, ∆V_OUT , in continuous mode is determined
by:
( ) ^
∆V_OUT ≈ ∆I_{L }R_ESR + _{8 • fOSC •}
1
C_BULK + C_CER


where f_OSC = operating frequency and ∆I_L = ripple current
in the inductor. The output ripple is highest at maximum
input voltage since ∆I_L increases with input voltage. The
first term in the ripple voltage equation relates to the
ripple current into the ESR of the output capacitor, which
dominates the output ripple voltage. The second term
guarantees that the output capacitance does not signifi-
cantly discharge during the operating frequency period
due to ripple current.
Note that the IMVP-6 or IMVP-6.5 application specifies
extremely low output voltage deviations. Therefore, the
output capacitor selection should be carefully considered.
The regulator should be located in close proximity to the
CPU. The bulk capacitor needs to be as close as possible
to the power supply pins of the processor to minimize the
parasitic inductance between the decoupling capacitor and
the load. In addition, multiple high performance ceramic
capacitors are normally placed in the processor socket
cavity to compensate for the PCB parasitic resistance
and inductance.
The Sanyo OS-CON semiconductor electrolyte capacitor
is one possible choice for high performance through-hole
capacitors. In surface mount applications, multiple paral-
lel capacitors are required to meet the ESR or transient
current handling requirements. Aluminum electrolytic
and dry tantalum capacitors are both available in surface
mount configurations. New special polymer surface mount
capacitors offer very low ESR but have much lower ca-
pacitive density per unit volume. In the case of tantalum,
it is critical that the capacitors are surge tested for use in
switching power supplies. Several excellent output capaci-
tor choices are the Sanyo POSCAP TPF, TPL and TPLF, or
the Panasonic SP series. Consult the manufacturer for
other specific recommendations.
Inductor Selection
The inductor in a typical LTC3816 circuit is chosen primarily
for its saturation current and inductance value. The induc-
tor DC rated current should be larger than the expected
peak current which is equal to:
I_L(PEAK)
=
I_LOAD(MAX)
+
∆I_L(MAX)
2
In addition, the selected inductor must be able to withstand
2 × I_LOAD(MAX) for a short duration without saturation (see
the Current Limit section).
The inductor value sets the ripple current, which is com-
monly chosen at around 20% to 30% of the anticipated
full load current. Higher inductance reduces ripple cur-
rent, core losses in the inductor, ESR losses in the output
capacitors and output voltage ripple. But, under rapid
loading conditions, higher inductance results in higher
peak-to-peak transient deviations. A lower value inductor
reduces the number of output capacitors and requires a
smaller PCB footprint for the LC filter. Highest efficiency
operation is obtained at low frequency with small ripple
current. However, achieving this requires a large induc-
tor and higher output ripple under transient conditions.
There is a trade-off between component size, efficiency
3816f
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