LTC3816_15 Datasheet, PDF (12/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
Pin Functions (eTSSOP/QFN)
CSLEW (Pin 15/Pin 12): VID DAC Slew Rate Control.
CSLEW is internally pulled up by a current source. Add a
capacitor to program the VID DAC transition slew rate. If
slow slew rate is selected, a 100pF capacitor connected
to CSLEW results in a VID DAC slew rate of 1.25mV/µs.
When slow slew rate is disabled, a 100pF capacitor results
in a VID DAC slew rate of 5mV/µs. Avoid coupling high
frequency switching signals to this pin. For the IMVP-6.5
configuration, the slow slew rate function is disabled.
VID0-VID6 (Pins 16-22/Pins 13-19): VID DAC Voltage
Control Logic Inputs. See Table 1.
RFREQ (Pin 23/Pin 20): Frequency Setting. The voltage
on the RFREQ pin determines the free-running operating
frequency. The RFREQ pin has an internal 10µA current
source pull-up allowing the switching frequency to be
programmed by a single external resistor to GND. Alter-
natively, this pin can be driven with a DC voltage source
to control the frequency of the internal oscillator. Floating
this pin or shorting this pin to INTV_CC allows the controller
to run at a fixed 400kHz frequency.
MODE/SYNC (Pin 24/Pin 21): Mode Select/Synchroniza-
tion Input. This pin is pulled up by an internal 1µA current
source. Floating this pin or shorting it to INTV_CC enables
pulse-skipping mode. Shorting this pin to ground con-
figures forced continuous mode. During frequency syn-
chronization, the phase-locked loop forces the controller
to operate in continuous mode with the falling top gate
signal synchronized to the falling edge of the MODE/SYNC
input pulse. During start-up, the controller is forced to run
in pulse-skipping mode.
BSOURCE (Pin 25/Pin 22): Bottom MOSFET Source. Con-
nect this pin to the source of the bottom power MOSFET.
Do not short BSOURCE to the LTC3816 exposed pad
directly.
BG (Pin 26/Pin 23): Bottom Gate Drive. The BG pin drives
the gate of the bottom N-channel synchronous switch
MOSFET.
INTV_CC (Pin 27/Pin 24): Output of the Internal Linear
Low Dropout Regulator. The driver and control circuits
are powered from this voltage source. The INTV_CC pin
must be decoupled to GND with a minimum 4.7µF low
ESR ceramic capacitor (X5R or better).
EXTV_CC (Pin 28/Pin 25): External Power Input to an Inter-
nal Switch Connected to INTV_CC. This switch closes and
supplies the IC power, bypassing the internal low dropout
regulator, whenever EXTV_CC is higher than 4.5V. Do not
exceed 6V on this pin.
V_IN (Pin 29/Pin 26): Main Supply Pin. A bypass capacitor
should be connected from this pin to the GND pin.
BOOST (Pin 30/Pin 27): Top Gate Driver Supply. The BOOST
pin should be decoupled to the SW node with a 0.1µF low
ESR (X5R or better) ceramic capacitor. An external Schottky
diode from INTV_CC to BOOST creates a complete floating
charge-pumped supply from BOOST to SW.
TG (Pin 31/Pin 28): Top Gate Drive. The TG pin drives
the top N-channel MOSFET with a voltage swing equal to
INTV_CC superimposed on the switch node voltage.
3816f
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