LTC3816_15 Datasheet, PDF (32/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
APPLICATIONS INFORMATION
Both MOSFETs have I²R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at the highest input voltage. The number,
type and on-resistance of all MOSFETs selected take into
account the voltage step-down ratio as well as the actual
position (main or synchronous) in which the MOSFET is
used. A much smaller, lower input capacitance MOSFET
should be used for the top MOSFET in applications where
V_IN >> V_OUT . The top MOSFET ’s on-resistance is normally
less important for overall efficiency than its input capaci-
tance at operating frequencies above 300kHz. MOSFET
manufacturers have designed special purpose devices that
provide reasonably low on-resistance with significantly
reduced input capacitance for the main switch in switching
regulators. The synchronous MOSFET losses are greatest
at high input voltages when the top switch duty cycle is
low or during a short circuit when the synchronous switch
is on close to 100% of the period.
The Schottky diode, D, shown in Figure 1 conducts during
the dead-time between the conduction of the two large
power MOSFETs. This prevents the body diode of the bot-
tom MOSFET from turning on, storing charge during the
dead time and requiring a reverse-recovery period which
could cost as much as several percent in efficiency. Due
to the relatively small average current, a 2A to 8A Schottky
is generally acceptable while offering a good compromise
between series resistance and capacitance. Larger diodes
result in additional transition loss due to their larger junc-
tion capacitance.
C_IN Selection
In continuous mode, the source current of the top N-chan-
nel MOSFET is a square wave of duty cycle V_OUT/V_IN. To
prevent large voltage transients, a low ESR input capacitor
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
( ) _{IRMS(MAX) ≈ILOAD(MAX)}
V_OUT V_IN – V_OUT
V_IN
This equation has a maximum RMS current at V_IN = 2V_OUT ,
where I_RMS(MAX) = I_LOAD(MAX)/2. This simple worst-case
condition is commonly used for design because even
significant deviations do not offer much relief. A typical
LTC3816 application operates at low duty cycle, hence,
the maximum input supply ripple current occurs at
V_IN = V_IN(MIN), and typically I_RMS(MAX) < I_LOAD(MAX)/2.5.
Note that capacitor manufacturers’ ripple current ratings
are often based on only 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose
a capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. Sanyo OS-CON SVP,
SVPD series or aluminum electrolytic capacitors from
Panasonic WA series in parallel with a couple of high
performance ceramic capacitors should be used as the
input supply bypass. Ceramic capacitors placed next to
the top MOSFET drain helps to reduce the input supply
voltage ripple.
C_OUT Selection
The output capacitor choice is primarily determined by the
voltage tolerance specifications due to large load current
transients encountered in typical LTC3816 applications.
The capacitance must be sufficient to absorb the change
in inductor current when a high current to low current
transition occurs. The opposite load current transition is
generally determined by the control loop compensation
components, so make sure not to overcompensate and
slow down the response. The minimum capacitance to
assure the inductor ’s energy is adequately absorbed is:
(₍ ) _{) CBULK}
+ C_CER
=
L
2V_OUT
∆I_LOAD ²
∆V_OUT(LOAD)
where C_BULK is the amount of bulk capacitance and C_CER
is the total amount of ceramic capacitance. To minimize
the output voltage overshoot during a load step, set:
∆V_OUT(LOAD) = ∆V_OUT(AVP)
3816f
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