LTC3816_15 Datasheet, PDF (31/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
APPLICATIONS INFORMATION
Power MOSFET and Schottky Diode Selection
The LTC3816 requires two external N-channel power
MOSFETs: One for the top (main) switch and one (or more)
for the bottom (synchronous) switch.
The peak-to-peak MOSFET gate drive levels are set by the
5.2V INTV_CC supply, requiring the use of logic-level thresh-
old MOSFETs in most applications. Pay close attention to
the BV_DSS specification for the MOSFETs as well; many
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs includes the
input capacitance, the on-resistance R_DS(ON), the input
voltage and the maximum output current. MOSFET input
capacitance is a combination of several components
but can be derived from the typical gate-charge  c  urve
included on most data sheets as shown in Figure 18. The
curve is generated by forcing a constant input current
into the gate of a common source, current source loaded
stage and then plotting the gate voltage versus time. The
initial slope is the effect of the gate-to-source and the
gate-to-drain capacitances. The flat portion of the curve
is the result of the Miller multiplication effect of the drain-
to-gate capacitance as the drain drops the voltage across
the current source load. The upper sloping line is due to
the drain-to-gate accumulation capacitance and the gate-
to-source capacitance.
The Miller charge (the increase in coulombs on the hori-
zontal axis from A to B while the curve is flat) is specified
for a given V_DS drain voltage, but can be adjusted for
different V_DS voltages by multiplying the ratio of the ap-
plication V_DS to the curve specified V_DS values. A way to
V_IN
V_GS
V_GS(MIL)
MILLER EFFECT
A
B
Q_IN
C_MILLER = (Q_B – Q_A)/V_DS
V
+
V_GS
–
+
– ^VDS
3816 F18
Figure 18. MOSFET Miller Capacitance
estimate the C_MILLER term is to take the change in gate
charge from points A and B on a manufacturers data sheet
and divide by the stated V_DS voltage specified. C_MILLER is
the most important selection criteria for determining the
transition loss term in the top MOSFET but is not directly
specified on MOSFET data sheets. C_RSS and C_OSS are
specified sometimes but definitions of these parameters
are not included.
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given
by:
Main Switch Duty Cycle = ^VOUT
V_IN
Synchronous Switch Duty Cycle = ^{VIN – VOUT}
V_IN
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
( ) ^{( ) P}MAIN
=
V_OUT
V_IN
I_LOAD(MAX)
2
1+ δ
R_DS(ON) +
( ) ( )( ) ^V_IN
2 ^ILOAD(MAX)
2
R_DR
C_MILLER •
( ) ^


V_INTVCC
1
– V_GS(MIL)
+
1
V_GS(MIL)



f_OSC
( ) ^{( ) P}_SYNC
=
V_IN
– V_OUT
V_IN
I_LOAD(MAX)
2
1+ δ
R_DS(ON)
where δ is the temperature dependency of R_DS(ON) and
R_DR is the effective top driver resistance (approximately
2.6Ω). V_GS(MIL) is the MOSFET V_GS at the Miller effect
transition. C_MILLER is the calculated capacitance using
the gate-charge curve from the MOSFET data sheet as
described above. The term (1 + δ) is generally given for
a MOSFET in the form of a normalized R_DS(ON) versus
temperature curve, but δ = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
3816f
31