LTC3816_15 Datasheet, PDF (27/44 Pages) Linear Technology – Single-Phase Wide VIN Range DC/DC Controller for Intel IMVP-6/IMVP-6.5 CPUs

LTC3816
APPLICATIONS INFORMATION
1. Select f_C = feedback crossover frequency =
f_OSC
N
where N is between 5 and 10.
2. At the feedback loop crossover frequency, f_C, the loop
gain is unity, therefore the error amplifier gain is:

V_COMP
V_SERVO
=
A_MOD
•
1
A_LC
•
V_SERVO
V_OUT
3. Place the error amplifier zero near the LC filter double-
pole frequency:
f_EA(ZERO)
=
2π
1
• R_C
•
C_C
≈
2π
1
L_LC_OUT
4. The feedforward zero is positioned to give the required
phase boost at the crossover frequency:

f_FF
(ZERO) ⁼
2π
•
1
R1•
C_FF
5. Place the error amplifier pole at 5f_C to suppress the
switching noise.

f_EA(POLE) =
2π
• R_C


1
C_C • C_C1 
C_C + C_{C1}
= 5f_C
Compensating the switching power supply voltage feed-
back loop is a complex task. The frequency compensation
equations shown in this data sheet were obtained using
some approximations to simplify the calculations. The
compensation values shown in this data sheet are typi-
cal values, optimized for the power components shown
in the circuit. Though similar power components should
suffice, substantially changing even one major power
component or circuit layout may degrade performance
significantly. To verify the calculated component values,
all new circuit designs should be prototyped and tested
for stability.
Line Feedforward (LFF)
The LTC3816 incorporates a line feedforward function to
compensate for changes in the line voltage and to simplify
the frequency compensation. On the other hand, with
the line feedforward enabled, the feedback loop has high
modulator gain and is more sensitive to noise pickup.
If the input supply voltage is low (e.g., around 5V) and
well regulated, it is better to disable the LFF function by
shorting the LFF pin to GND. Without LFF , the modulator
gain A_MOD(WOLFF) is reduced and the control loop is less
sensitive to noise injection.
A_MOD(WOLFF) ≈ 0.85 • V_IN
If line feedforward is disabled, the control loop needs to
be recompensated in order to account for the reduction
in modulator gain.
DPRSLPVR and VID DAC Slew Rate Control
The LTC3816 allows the user to program the VID DAC
voltage transition slew rate by adding a capacitor at the
CSLEW pin. In the IMVP-6.5 mode, CSLEW is internally
pulled up by a 40µA current source. Upon a code transition
command, CSLEW is ramped up by the internal current
source. When the capacitor, C_SLEW , potential reaches 1V,
the VID DAC output voltage jumps by 1 LSB (12.5mV) and
the controller resets the C_SLEW capacitor. This operation
repeats until the DAC reaches its target value. The DAC
voltage slew rate is given by the following equation:
dV_DAC
dt
=
12.5mV
•
I_CSLEW
C_SLEW
where I_CSLEW = 40µA.
When the IMVP-6 configuration is selected, the LTC3816
allows two different slew rates as shown in Figure 15.
To configure the normal slew rate, short the pin DPRSLPVR
to ground. To configure for a slower slew rate, force the
DPRSLPVR pin potential above 1.6V. 2  5µs after the control-
ler detects a low-to-high transition at the DPRSLPVR pin,
3816f
27