LTC3899_15 Datasheet, PDF (33/38 Pages) Linear Technology – 60V Low IQ, Triple Output, Buck/Buck/Boost Synchronous Controller

LTC3899
Applications Information
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
IC. Figure 11 illustrates the current waveforms present in
the various branches of the 2-phase synchronous buck
regulators operating in the continuous mode. Check the
following in your layout:
1. Are the top N-channel MOSFETs MTOP1 and MTOP2
located within 1cm of each other with a common drain
connection at C_IN? Do not attempt to split the input
decoupling for the two channels as it can cause a large
resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return
of C_DRVCC must return to the combined C_OUT (–) termi-
nals. The path formed by the top N-channel MOSFET,
Schottky diode and the C_IN capacitor should have short
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
3. Does the LTC3899 V_FB pins’ resistive divider connect to
the (+) terminal of C_OUT? The resistive divider must be
connected between the (+) terminal of C_OUT and signal
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
V_IN
R_IN
C_IN
SW1
L1
R_{SENSE1 VOUT1}
C_OUT1
R_L1
SW2
BOLD LINES INDICATE
HIGH SWITCHING
CURRENT. KEEP LINES
TO A MINIMUM LENGTH.
L2
R_{SENSE2 VOUT2}
C_OUT2
R_L2
3899 F12
Figure 11. Branch Current Waveforms for Bucks
For more information www.linear.com/LTC3899
3899f
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