LTC3899_15 Datasheet, PDF (30/38 Pages) Linear Technology – 60V Low IQ, Triple Output, Buck/Buck/Boost Synchronous Controller

LTC3899
Applications Information
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FREQ PIN RESISTOR (kΩ)
3899 F11
Figure 10. Relationship Between Oscillator
Frequency and Resistor Value at the FREQ Pin
Minimum On-Time Considerations
Minimum on-time, t_ON(MIN), is the smallest time duration
that the LTC3899 is capable of turning on the top MOSFET
(bottom MOSFET for the boost controller). It is determined
by internal timing delays and the gate charge required to
turn on the top MOSFET. Low duty cycle applications may
approach this minimum on-time limit and care should be
taken to ensure that:
t_{ON(MIN) _}
BUCK
<
V_OUT
V_IN(f)
t_{ON(MIN)_ BOOST}
<
V_OUT − V_IN
V_OUT (f)
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3899 is approximately
80ns for the bucks and 120ns for the boost. However, for
the buck channels as the peak sense voltage decreases
the minimum on-time gradually increases up to about
130ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If the
duty cycle drops below the minimum on-time limit in this
situation, a significant amount of cycle skipping can occur
with correspondingly larger current and voltage ripple.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3899 circuits: 1) IC V_BIAS current, 2) DRV_CC
regulator current, 3) I²R losses, 4) Topside MOSFET
transition losses.
1. The V_BIAS current is the DC supply current given in the
Electrical Characteristics table, which excludes MOS-
FET driver and control currents. V_BIAS current typically
results in a small (<0.1%) loss.
2. DRV_CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from DRV_CC to ground. The resulting dQ/dt is a cur-
rent out of DRV_CC that is typically much larger than the
control circuit current. In continuous mode, I_GATECHG
= f(Q_T + Q_B), where Q_T and Q_B are the gate charges of
the topside and bottom side MOSFETs.
Supplying DRV_CC from an output-derived source power
through EXTV_CC will scale the V_IN current required for
the driver and control circuits by a factor of (Duty Cycle)/
(Efficiency). For example, in a 20V to 5V application,
10mA of DRV_CC current results in approximately 2.5mA
of V_IN current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
V_IN) to only a few percent.
3. I²R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resis-
tor and input and output capacitor ESR. In continuous
3899f
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