LTC3899_15 Datasheet, PDF (25/38 Pages) Linear Technology – 60V Low IQ, Triple Output, Buck/Buck/Boost Synchronous Controller

LTC3899
Applications Information
Setting Boost Output Voltage (VPRG3 Pin)
Through control of the VPRG3 pin the boost controller
output voltage can be set by an external feedback resis-
tor divider or programmed to a fixed 10V or 12V output.
Floating VPRG3 allows the boost output voltage to be set
by an external feedback resistor divider placed across
the output, as shown in Figure 4a. The regulated output
voltage is determined by:
V_OUT(BOOST)
=
1.2V


1+
R_B
R_A


Tying the VPRG3 to INTV_CC or GND configures the boost
controller in fixed output voltage mode. Figure 4b shows
how the V_FB3 pin is used to sense the output voltage in
this mode. Tying VPRG3 to INTV_CC programs the boost
output to 12V, whereas tying VPRG3 to GND programs
the output to 10V.
V_OUT3
(FLOAT)
LTC3899
VPRG3 V_FB3
R_B
C_FF
R_A
3899 F06a
(4a) Setting Boost Output Using External Resistors
INTV_CC/GND
LTC3899
VPRG3 V_FB3
V_OUT3
12V/10V
C_OUT
3899 F06b
(4b) Setting Boost to Fixed 12V/10V Output
Figure 4. Setting CH3 Output Voltage
RUN Pins
The LTC3899 is enabled using the RUN1, RUN2 and RUN3
pins. The RUN pins have a rising threshold of 1.275V with
75mV of hysteresis. Pulling a RUN pin below 1.2V shuts
down the main control loop for that channel. Pulling all
three RUN pins below 0.7V disables the controllers and
most internal circuits, including the DRV_CC and INTV_CC
LDOs. In this state, the LTC3899 draws only 3.6µA of
quiescent current.
Releasing a RUN pin allows a small 150nA internal current
to pull up the pin to enable that controller. Because of
condensation or other small board leakage pulling the pin
down, it is recommended the RUN pins be externally pulled
up or driven directly by logic. Each RUN pin can tolerate
up to 65V (absolute maximum), so it can be conveniently
tied to V_BIAS in always-on applications where one or more
controllers are enabled continuously and never shut down.
The RUN pins can be implemented as a UVLO by con-
necting them to the output of an external resistor divider
network off V_BIAS, as shown in Figure 5.
V_BIAS
1/3 LTC3899
RUN
R_B
R_A
3899 F13
Figure 5. Using the RUN Pins as a UVLO
The rising and falling UVLO thresholds are calculated using
the RUN pin thresholds and pull-up current:
V_UVLO(RISING)
=
1.275V


1+
R_B
R_A


–
150nA
• R_B
V_{UVLO(FALLING)}
=
1.20V


1+
R_B
R_A


–
150nA
• R_B
Tracking and Soft-Start (TRACK/SS1, TRACK/SS2,
SS3 Pins)
The start-up of each V_OUT is controlled by the volt-
age on the TRACK/SS pin (TRACK/SS1 for channel 1,
TRACK/SS2 for channel 2, SS3 for channel 3). When the
voltage on the TRACK/SS pin is less than the internal
0.8V reference (1.2V reference for the boost channel),
the LTC3899 regulates the V_FB pin voltage to the voltage
on the TRACK/SS pin instead of the internal reference.
The TRACK/SS pin can be used to program an external
soft-start function or to allow V_OUT to track another sup-
ply during start-up.
For more information www.linear.com/LTC3899
3899f
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