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LTC3899_15 Datasheet, PDF (27/38 Pages) Linear Technology – 60V Low IQ, Triple Output, Buck/Buck/Boost Synchronous Controller
LTC3899
Applications Information
peak current of at least 50mA and must be bypassed to
ground with a minimum of 4.7μF ceramic capacitor. Good
bypassing is needed to supply the high transient currents
required by the MOSFET gate drivers and to prevent in-
teraction between the channels. The INTVCC supply must
be bypassed with a 0.1μF ceramic capacitor.
The DRVSET pin programs the DRVCC supply voltage as
well as the DRVCC, UVLO, and EXTVCC switchover threshold
voltages. Table 1 summarizes the different DRVSET pin
configurations along with the voltage settings that go with
each configuration. Tying the DRVSET pin to INTVCC pro-
grams DRVCC to 10V and chooses the higher UVLO/EXTVCC
thresholds. Tying the DRVSET pin to GND programs DRVCC
to 6V and chooses the lower UVLO/EXTVCC thresholds.
By placing a 50k to 100k resistor between DRVSET and
GND the DRVCC voltage can be programmed between 5V
to 10V, as shown in Figure 9. With a resistor on DRVSET,
the lower UVLO/EXTVCC thresholds are chosen.
Table 1
DRVSET PIN
0V
INTVCC
Resistor to GND
50k to 100k
DRVCC
VOLTAGE
6V
10V
5V to 10V
DRVCC UVLO
RISING / FALLING
THRESHOLDS
4.0V / 3.8V
7.5V / 6.7V
4.0V / 3.8V
EXTVCC
SWITCHOVER
THRESHOLD
4.7V
7.7V
4.7V
11
10
9
8
7
6
5
4
50 55 60 65 70 75 80 85 90 95 100
DRVSET PIN RESISTOR (kΩ)
3899 F10
Figure 9. Relationship Between DRVCC Voltage
and Resistor Value at DRVSET Pin
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the
maximum junction temperature rating for the LTC3899
to be exceeded. The DRVCC current, which is dominated
by the gate charge current, may be supplied by either the
VBIAS LDO or the EXTVCC LDO. When the voltage on the
EXTVCC pin is less than its switchover threshold (4.7V or
7.7V as determined by the DRVSET pin described above),
the VBIAS LDO is enabled. Power dissipation for the IC in
this case is highest and is equal to VBIAS • IDRVCC. The
gate charge current is dependent on operating frequency
as discussed in the Efficiency Considerations section.
The junction temperature can be estimated by using the
equations given in Note 2 of the Electrical Characteristics.
For example, using the LTC3899 in the QFN package and
setting DRVCC to 6V, the DRVCC current is limited to less
than 45mA from a 40V supply when not using the EXTVCC
supply at a 70°C ambient temperature:
TJ = 70°C + (45mA)(40V – 6V)(34°C/W) = 125°C
To prevent the maximum junction temperature from be-
ing exceeded, the VBIAS supply current must be checked
while operating in forced continuous mode (PLLIN/MODE
= INTVCC) at maximum VBIAS.
When the voltage applied to EXTVCC rises above its
switch­over threshold, the VBIAS LDO is turned off and the
EXTVCC LDO is enabled. The EXTVCC LDO remains on as
long as the voltage applied to EXTVCC remains above the
switchover threshold minus the comparator hysteresis.
The EXTVCC LDO attempts to regulate the DRVCC voltage
to the voltage as programmed by the DRVSET pin, so while
EXTVCC is less than this voltage, the LDO is in dropout
and the DRVCC voltage is approximately equal to EXTVCC.
When EXTVCC is greater than the programmed voltage,
up to an absolute maximum of 14V, DRVCC is regulated
to the programmed voltage.
Using the EXTVCC LDO allows the MOSFET driver and
control power to be derived from one of the LTC3899’s
switching regulator outputs (4.7V/7.7V ≤ VOUT ≤ 14V)
during normal operation and from the VBIAS LDO when
the output is out of regulation (e.g., start-up, short circuit).
If more current is required through the EXTVCC LDO than
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