LTC3815_15 Datasheet, PDF (29/42 Pages) Linear Technology – 6A Monolithic Synchronous DC/DC Step-Down Converter with Digital Power System Management

LTC3815
Applications Information
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: V_IN quiescent current and I²R losses. The V_IN
quiescent current loss dominates the efficiency loss at
very low load currents whereas the I²R loss dominates
the efficiency loss at medium to high load currents. In a
typical efficiency plot, the efficiency curve at very low load
currents can be misleading since the actual power lost is
usually of no consequence.
1. The V_IN quiescent current is due to two components: the
DC bias current as given in the Electrical Characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
from switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
low to high to low again, a packet of charge dQ moves
from V_IN to ground. The resulting dQ/dt is the current
out of V_IN due to gate charge, and it is typically larger
than the DC bias current. Both the DC bias and gate
charge losses are proportional to V_IN; thus, their effects
will be more pronounced at higher supply voltages.
2. I²R losses are calculated from the resistances of the
internal switches, R_SW , and external inductor, R_L. In
continuous mode the average output current flowing
through inductor L is chopped between the main switch
and the synchronous switch. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R_DS(ON) and the duty cycle (DC) as
follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Character-
istics curves. To obtain I²R losses, simply add R_SW to
R_L and multiply the result by the square of the average
output current.
Other losses including C_IN and C_OUT ESR dissipative
losses and inductor core losses generally account for
less than 2% of the total loss.
Thermal Considerations
In most applications, the LTC3815 does not dissipate
much heat due to its high efficiency.
However, in applications where the LTC3815 is running
at high ambient temperature with low supply voltage and
high duty cycles, such as in dropout, the heat dissipated
may exceed the maximum junction temperature of the part.
If the junction temperature reaches approximately 160°C,
both power switches will be turned off and the SW node
will become high impedance.
To prevent the LTC3815 from exceeding the maximum
junction temperature, some thermal analysis is required.
The temperature rise is given by:
T_RISE = (P_D)(θ_JA)
where P_D is the power dissipated by the regulator and
θ_JA is the thermal resistance from the junction of the die
to the ambient temperature. The junction temperature,
T_J, is given by:
T_J = T_A + T_RISE
where T_A is the ambient temperature.
As an example, consider the case when the LTC3815 is in
dropout at an input voltage of 3.3V with a load current of
6A at an ambient temperature of 70°C. From the Typical
Performance Characteristics graph of Switch Resistance,
the R_DS(ON) resistance of the P‑channel switch is 0.035Ω.
Therefore, power dissipated by the part is:
P_D = (I_OUT)² • R_DS(ON) = 1.26W
For the QFN package, the θ_JA is 38°C/W.
For more information www.linear.com/LTC3815
3815p
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