LTC3815_15 Datasheet, PDF (11/42 Pages) Linear Technology – 6A Monolithic Synchronous DC/DC Step-Down Converter with Digital Power System Management

LTC3815
Pin Functions
C_SLEW (Pin 28): Slew Rate Control. Add a capacitor to
program the V_OUT transition slew rate during margining.
The slew rate is equal to 0.1% per ms per nF slew rate
capacitance. With a 1nF capacitor, the slew rate is 0.1%/
ms. Two default slew rates are also available when this
pin is open or shorted to V_IN.
TRACK/SS (Pin 30): Tracking/Soft-Start Input. For soft-
start, a capacitor to ground at this pin sets the ramp rate
of the output voltage (approximately 5V/sec/μF). For
coincident tracking, connect this pin to a resistive divider
between the voltage to be tracked and ground.
V_{SS_SENSE} (Pin 31): V_OUT Negative Terminal Voltage Sense.
The internal unity gain differential gain amplifier connects
to the V_OUT negative terminal through this pin. Tying this
pin to the V_IN pin forces the IC to operate as a slave in a
two-phase configuration.
V_{CC_SENSE} (Pin 32): V_OUT Positive Terminal Voltage Sense.
The internal unity gain differential gain amplifier connects
to the V_OUT positive terminal through this pin.
DA_OUT (Pin 33): Differential Amplifier Output.
I_TH (Pin 34): Error Amplifier Output and Switching Regu-
lator Compensation Point. The current comparator’s trip
threshold is linearly proportional to this voltage. Use an RC
network between the I_TH pin and the V_FB pin to compensate
the feedback loop for optimum transient response.
FB (Pin 35): Error Amplifier Input. FB will be servoed to
the REF pin voltage plus or minus any margining offset
set through the serial interface.
REF (Pin 36): Reference Input and Programming Pin. The
voltage at this pin is the default reference that the output
is regulated to. The PMBus interface allows margining
around this default voltage by up to ±25%. This pin can
be driven by an external voltage or can be programmed
with a resistor to ground. An internal accurate low drift
100μA current source times the external resistor sets the
reference voltage.
PGLIM (Pin 37): PGOOD Threshold Programming Pin.
The voltage difference ΔV between this pin and SGND
sets the V_OUT overvoltage threshold to V_REF +0.4 • ΔV and
the undervoltage threshold to V_REF –0.4 • ΔV. Tying this
pin to V_IN sets the threshold to its default value of ±10%.
SGND (Pin 38): Signal Ground. Reference setting resistor,
slew rate control capacitor, and frequency setting resistor
connections should return to SGND. For optimum load
regulation, the SGND pin should be kelvin-connected to
the PCB location between the negative terminals of the
output capacitors and should not be connected through
the PGND plane.
PGND (Exposed Pad Pin 39): Power Ground. Must be
soldered to PCB for electrical connection and rated thermal
performance.
For more information www.linear.com/LTC3815
3815p
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