LTC3815_15 Datasheet, PDF (17/42 Pages) Linear Technology – 6A Monolithic Synchronous DC/DC Step-Down Converter with Digital Power System Management

LTC3815
Operation
During soft-start, the LTC3815 forces the controller to
operate in discontinuous mode until the soft-start volt-
age reaches the internal reference to guarantee smooth
startup into a precharged output capacitor. During margin-
ing transitions and overvoltage conditions, however, the
LTC3815 always operates in forced continuous mode to
allow the switcher to sink current.
SERIAL INTERFACE
The LTC3815 serial interface is a PMBus compliant slave
device and can operate at any frequency between 10kHz
and 400kHz. The address is configurable using an external
resistor. In addition the LTC3815 always responds to the
global broadcast address of 0x5A or 0x5B (7 bit). The
serial interface supports the following protocols defined
in the PMBus specifications: 1) send command, 2) write
byte, 3) write word, 4) group, 5) read byte and 6) read
word. The PMBus write operations are not acted upon
until a complete valid message is received by the LTC3815
including the STOP bit.
Communication Failure
Attempts to access unsupported commands or writing
invalid data to supported commands will result in a CML
fault. The CML bit is set in the STATUS_WORD command
and the ALERT pin is pulled low.
Device Addressing
The LTC3815 offers four different types of addressing over
the PMBus interface, specifically: 1) global, 2) device, 3)
rail addressing and 4) alert response address (ARA).
Global addressing provides a means of the PMBus master
to address all LTC3815 devices on the bus. The LTC3815
global address is fixed 0x5A or 0x5B (7 bit) or 0xB4 or
0xB6 (8 bit) and cannot be disabled.
Device addressing provides the standard means of the
PMBus master communicating with a single instance of an
LTC3815. The value of the device address is set by the ASEL
configuration pin. Rail addressing provides a means of the
PMBus master addressing a set of channels connected
to the same output rail, simultaneously. This is similar to
global addressing, however, the PMBus address can be
dynamically assigned by using the MFR_RAIL_ADDRESS
command. It is recommended that rail addressing should
be limited to command write operations.
All four means of PMBus addressing require the user to
employ disciplined planning to avoid addressing conflicts.
Fault Status
The STATUS_WORD and ALERT pin provide fault status
information of the LTC3815 to the host.
Bus Timeout Failure
The LTC3815 implements a timeout feature to avoid hang-
ing the serial interface. The data packet timer begins at the
first START event before the device address write byte.
Data packet information must be completed within 25ms
or the LTC3815 will tri-state the bus and ignore the given
data packet. Data packet information includes the device
address byte write, command byte, repeat start event
(if a read operation), device address byte read (if a read
operation), and all data bytes.
The user is encouraged to use as high a clock rate as
possible to maintain efficient data packet transfer between
all devices sharing the serial bus interface. The LTC3815
supports the full PMBus frequency range from 10kHz to
400kHz.
Similarity Between PMBus, SMBus and I²C 2-Wire
Interface
The PMBus 2-wire interface is an incremental extension
of the SMBus. SMBus is built upon I²C with some minor
differences in timing, DC parameters and protocol. The
PMBus/SMBus protocols are more robust than simple I²C
byte commands because PMBus/SMBus provide time-outs
to prevent bus hangs and optional packet error checking
(PEC) to ensure data integrity. In general, a master device
that can be configured for I²C communication can be
used for PMBus communication with little or no change
to hardware or firmware. Repeat start (restart) is not sup-
ported by all I²C controllers but is required for SMBus/
PMBus reads. If a general purpose I²C controller is used,
check that repeat start is supported.
For more information www.linear.com/LTC3815
3815p
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