LTC3736-2 Datasheet, PDF (16/28 Pages) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Output Tracking

LTC3736-2
APPLICATIO S I FOR ATIO
Operating Frequency and Synchronization
The choice of operating frequency, f_OSC, is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing MOSFET switch-
ing losses, both gate charge loss and transition loss.
However, lower frequency operation requires more induc-
tance for a given amount of ripple current.
The internal oscillator for each of the LTC3736-2’s control-
lers runs at a nominal 550kHz frequency when the PLLLPF
pin is left floating and the SYNC/FCB pin is a DC low or
high. Pulling the PLLLPF to V_IN selects 750kHz operation;
pulling the PLLLPF to GND selects 300kHz operation.
Alternatively, the LTC3736-2 will phase-lock to a clock
signal applied to the SYNC/FCB pin with a frequency
between 250kHz and 850kHz (see Phase-Locked Loop
and Frequency Synchronization).
Inductor Value Calculation
Given the desired input and output voltages, the inductor
value and operating frequency f_OSC directly determine the
inductor’s peak-to-peak ripple current:
I_RIPPLE
=
V_OUT
V_IN
⎛
⎝⎜
V_IN – V_OUT
f_OSC • L
⎞
⎠⎟
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors, and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
A reasonable starting point is to choose a ripple current
that is about 40% of I_OUT(MAX). Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
L ≥ ^{VIN – VOUT} • ^VOUT
f_OSC • I_RIPPLE V_IN
Inductor Core Selection
Once the inductance value is determined, the type of
inductor must be selected. Core loss is independent of
core size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance re-
quires more turns of wire and therefore copper losses will
increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Schottky Diode Selection (Optional)
The Schottky diodes D1 and D2 in Figure 16 conduct
current during the dead time between the conduction of
the power MOSFETs . This prevents the body diode of the
bottom N-channel MOSFET from turning on and storing
charge during the dead time, which could cost as much as
1% in efficiency. A 1A Schottky diode is generally a good
size for most LTC3736-2 applications, since it conducts a
relatively small average current. Larger diodes result in
additional transition losses due to their larger junction
capacitance. This diode may be omitted if the efficiency
loss can be tolerated.
C_IN and C_OUT Selection
The selection of C_IN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can
be shown that the worst-case capacitor RMS current
occurs when only one controller is operating. The control-
ler with the highest (V_OUT)(I_OUT) product needs to be used
in the formula below to determine the maximum RMS
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