LTC3736-2 Datasheet, PDF(10/28 Page) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Output Tracking

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LTC3736-2 Datasheet, PDF (10/28 Pages) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Output Tracking

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LTC3736-2

OPERATIO (Refer to Functional Diagram)

Main Control Loop

The LTC3736-2 uses a constant frequency, current mode

architecture with the two controllers operating 180 de-

grees out of phase. During normal operation, the top

external P-channel power MOSFET is turned on when the

clock for that channel sets the RS latch, and turned off

when the current comparator (ICMP) resets the latch. The

peak inductor current at which ICMP resets the RS latch is

determined by the voltage on the ITH pin, which is driven

by the output of the error amplifier (EAMP). The VFB pin

receives the output voltage feedback signal from an exter-

nal resistor divider. This feedback signal is compared to

the internal 0.6V reference voltage by the EAMP. When the

load current increases, it causes a slight decrease in VFB

relative to the 0.6V reference, which in turn causes the ITH

voltage to increase until the average inductor current

matches the new load current. While the top P-channel

MOSFET is off, the bottom N-channel MOSFET is turned

on until either the inductor current starts to reverse, as

indicated by the current reversal comparator, IRCMP, or the

beginning of the next cycle.

Shutdown, Soft-Start and Tracking Start-Up

(RUN/SS and TRACK Pins)

The LTC3736-2 is shut down by pulling the RUN/SS pin

low. In shutdown, all controller functions are disabled and

the chip draws only 9ÂµA. The TG outputs are held high (off)

and the BG outputs low (off) in shutdown. Releasing

RUN/SS allows an internal 0.7ÂµA current source to charge

up the RUN/SS pin. When the RUN/SS pin reaches 0.65V,

the LTC3736-2âs two controllers are enabled.

The start-up of VOUT1 is controlled by the LTC3736-2âs

internal soft-start. During soft-start, the error amplifier

EAMP compares the feedback signal VFB1 to the internal

soft-start ramp (instead of the 0.6V reference), which rises

linearly from 0V to 0.6V in about 1ms. This allows the

output voltage to rise smoothly from 0V to its final value,

while maintaining control of the inductor current.

The 1ms soft-start time can be increased by connecting

the optional external soft-start capacitor CSS between the

RUN/SS and SGND pins. As the RUN/SS pin continues to

rise linearly from approximately 0.65V to 1.3V (being

charged by the internal 0.7ÂµA current source), the EAMP

regulates the VFB1 proportionally linearly from 0V to 0.6V.

The start-up of VOUT2 is controlled by the voltage on the

TRACK pin. When the voltage on the TRACK pin is less

than the 0.6V internal reference, the LTC3736-2 regulates

the VFB2 voltage to the TRACK pin instead of the 0.6V

reference. Typically, a resistor divider on VOUT1 is con-

nected to the TRACK pin to allow the start-up of VOUT2 to

âtrackâ that of VOUT1. For one-to-one tracking during start-

up, the resistor divider would have the same values as the

divider on VOUT2 that is connected to VFB2.

Light Load Operation (Pulse-Skipping or Continuous

Conduction) (SYNC/FCB Pin)

The LTC3736-2 can be enabled to enter high efficiency

pulse-skipping operation or forced continuous conduc-

tion mode at low load currents. To select pulse-skipping

operation, tie the SYNC/FCB pin to a DC voltage above 0.6V

(e.g., VIN). To select forced continuous operation, tie the

SYNC/FCB to a DC voltage below 0.6V (e.g., SGND). This

0.6V threshold between pulse-skipping operation and

forced continuous mode can be used in secondary wind-

ing regulation as described in the Auxiliary Winding Con-

trol Using SYNC/FCB Pin discussion in the Applications

Information section.

In forced continuous operation, the inductor current is

allowed to reverse at light loads or under large transient

conditions. The peak inductor current is determined by the

voltage on the ITH pin. The P-channel MOSFET is turned on

every cycle (constant frequency) regardless of the ITH pin

voltage. In this mode, the efficiency at light loads is lower

than in pulse-skipping operation. However, continuous

mode has the advantages of lower output ripple and less

interference with audio circuitry.

When the SYNC/FCB pin is tied to a DC voltage above 0.6V

or when it is clocked by an external clock source to use the

phase-locked loop (see Frequency Selection and Phase-

Locked Loop), the LTC3736-2 operates in PWM pulse-

skipping mode at light loads. In this mode, the current

comparator ICMP may remain tripped for several cycles and

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