LTC3736-2 Datasheet, PDF (12/28 Pages) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Output Tracking

LTC3736-2
U
OPERATIO (Refer to Functional Diagram)
Undervoltage Lockout
To prevent operation of the external MOSFETs below safe
input voltage levels, an undervoltage lockout is incorporated
in the LTC3736-2. When the input supply voltage (V_IN)
drops below 2.3V, the external P- and N-channel MOSFETs
and all internal circuitry are turned off except for the und-
ervoltage block, which draws only a few microamperes.
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG1 and IPRG2 Pins)
When a controller is operating below 20% duty cycle, the
peak current sense voltage (between the SENSE⁺ and SW
pins) allowed across the external P-channel MOSFET is
determined by:
( ) _{∆VSENSE(MAX)}
=
A
V_ITH – 0.7V
10
where A is a constant determined by the state of the IPRG
pins. Floating the IPRG pin selects A = 1.875; tying IPRG
to V_IN selects A = 2.7; tying IPRG to SGND selects A = 1.3.
The maximum value of V_ITH is typically about 1.98V, so the
maximum sense voltage allowed across the external
P-channel MOSFET is 240mV, 345mV, or 167mV for the
three respective states of the IPRG pin. The peak sense
voltages for the two controllers can be independently
selected by the IPRG1 and IPRG2 pins.
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by a scale factor given by the curve in
Figure 1.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external P-channel
MOSFET:
I_PK
=
∆V_SENSE(MAX)
R_DS(ON)
12
110
100
90
80
70
60
50
40
30
20
10
0
0 10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
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Figure 1. Maximum Peak Current vs Duty Cycle
Power-Good (PGOOD) Pin
A window comparator monitors both feedback voltages
and the open-drain PGOOD output pin is pulled low when
either or both feedback voltages are not within ±10% of
the 0.6V reference voltage. PGOOD is low when the
LTC3736-2 is shut down or in undervoltage lockout.
2-Phase Operation
Why the need for 2-phase operation? Until recently, con-
stant frequency dual switching regulators operated both
controllers in phase (i.e., single phase operation). This
means that both topside MOSFETs (P-channel) are turned
on at the same time, causing current pulses of up to twice
the amplitude of those from a single regulator to be drawn
from the input capacitor. These large amplitude pulses
increase the total RMS current flowing in the input capaci-
tor, requiring the use of larger and more expensive input
capacitors, and increase both EMI and power losses in the
input capacitor and input power supply.
With 2-phase operation, the two controllers of the LTC3736-2
are operated 180 degrees out of phase. This effectively
interleaves the current pulses coming from the topside
MOSFET switches, greatly reducing the time where they
overlap and add together. The result is a significant
reduction in the total RMS current, which in turn allows the
use of smaller, less expensive input capacitors, reduces
shielding requirements for EMI and improves real world
operating efficiency.
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