LTC3736-2 Datasheet, PDF (11/28 Pages) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Output Tracking

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OPERATIO (Refer to Functional Diagram)
force the external P-channel MOSFET to stay off for the same
number of cycles. The inductor current is not allowed to
reverse, though (discontinuous operation). This mode, like
forced continuous operation, exhibits low output ripple as
well as low audio noise and reduced RF interference.
However, it provides low current efficiency higher than
forced continuous mode. During start-up or a short-circuit
condition (V_FB1 or V_FB2 ≤ 0.54V), the LTC3736-2 operates
in pulse-skipping mode (no current reversal allowed),
regardless of the state of the SYNC/FCB pin.
Short-Circuit Protection
When an output is shorted to ground (V_FB < 0.12V), the
switching frequency of that controller is reduced to 1/5 of
the normal operating frequency. The other controller is
unaffected and maintains normal operation.
The short-circuit threshold on V_FB2 is based on the smaller
of 0.12V and a fraction of the voltage on the TRACK pin.
This also allows V_OUT2 to start up and track V_OUT1 more
easily. Note that if V_OUT1 is truly short-circuited
(V_OUT1 = V_FB1 = 0V), then the LTC3736-2 will try to
regulate V_OUT2 to 0V if a resistor divider on V_OUT1 is
connected to the TRACK pin.
Output Overvoltage Protection
As a further protection, the overvoltage comparator (OV)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the V_FB pin has risen 13.33%
above the reference voltage of 0.6V, the external P-chan-
nel MOSFET is turned off and the N-channel MOSFET is
turned on until the overvoltage is cleared.
Frequency Selection and Phase-Locked Loop
(PLLLPF and SYNC/FCB Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency operation
increases efficiency by reducing MOSFET switching losses,
LTC3736-2
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.
The switching frequency of the LTC3736-2’s controllers
can be selected using the PLLLPF pin.
If the SYNC/FCB is not being driven by an external clock
source, the PLLLPF can be floated, tied to V_IN or tied to
SGND to select 550kHz, 750kHz or 300kHz respectively.
A phase-locked loop (PLL) is available on the LTC3736-2
to synchronize the internal oscillator to an external
clock source that is connected to the SYNC/FCB pin. In
this case, a series RC should be connected between the
PLLLPF pin and SGND to serve as the PLL’s loop filter. The
LTC3736-2 phase detector adjusts the voltage on the
PLLLPF pin to align the turn-on of controller 1’s external
P-channel MOSFET to the rising edge of the synchroniz-
ing signal. Thus, the turn-on of controller 2’s external
P-channel MOSFET is 180 degrees out of phase with the
rising edge of the external clock source.
The typical capture range of the LTC3736-2’s phase-
locked loop is from approximately 200kHz to 1MHz, and is
guaranteed over temperature to be between 250kHz and
850kHz. In other words, the LTC3736-2’s PLL is guaran-
teed to lock to an external clock source whose frequency
is between 250kHz and 850kHz.
Dropout Operation
When the input supply voltage (V_IN) decreases towards
the output voltage, the rate of change of the inductor
current while the external P-channel MOSFET is on (ON
cycle) decreases. This reduction means that the P-channel
MOSFET will remain on for more than one oscillator cycle
if the inductor current has not ramped up to the threshold
set by the EAMP on the I_TH pin. Further reduction in the
input supply voltage will eventually cause the P-channel
MOSFET to be turned on 100%, i.e., DC. The output
voltage will then be determined by the input voltage minus
the voltage drop across the P-channel MOSFET and the
inductor.
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