LTC3709_15 Datasheet, PDF (15/24 Pages) Linear Technology – Fast 2-Phase, No RSENSE Synchronous DC/DC Controller with Tracking/Sequencing

LTC3709
APPLICATIO S I FOR ATIO
The selection of C_OUT is primarily determined by the ESR
required to minimize voltage ripple and load step transients.
The output ripple ∆V_OUT is approximately bounded by:
∆V_OUT
≤
⎛
∆I_{L ⎝⎜}ESR
+
1
8fC_OUT
⎞
⎠⎟
Since ∆I_L increases with input voltage, the output ripple is
highest at maximum input voltage. Typically, once the ESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long-
term reliability. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. High performance
through-hole capacitors may also be used, but an addi-
tional ceramic capacitor in parallel is recommended to
reduce the effect of their lead inductance.
Top MOSFET Driver Supply (C_B, D_B)
An external bootstrap capacitor C_B connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode D_B from DRV_CC
when the switch node is low. Note that the average voltage
across C_B is approximately DRV_CC. When the top MOSFET
turns on, the switch node rises to V_IN and the BOOST pin
rises to approximately V_IN + DRV_CC. The boost capacitor
needs to store about 100 times the gate charge required by
the top MOSFET. In most applications 0.1µF to 0.47µF is
adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin to V_CC enables discontinuous operation where the
bottom MOSFET turns off when inductor current reverses.
The load current at which inductor current reverses and
discontinuous operation begins depends on the amplitude
of the inductor ripple current. The ripple current depends
on the choice of inductor value and operating frequency as
well as the input and output voltages.
Tying the FCB pin to ground forces continuous synchro-
nous operation, allowing current to reverse at light loads
and maintaining high frequency operation.
Besides providing a logic input to force continuous opera-
tion, the FCB pin acts as the input for external clock syn-
chronization. Upon detecting a TTL level clock and the fre-
quency is higher than the minimum allowable, channel 1
will lock on to this external clock. This will be followed by
channel 2 (see PLL and Frequency Synchronization). The
LTC3709 will be forced to operate in forced continuous
mode in this situation.
Fault Conditions: Current Limit
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC3709, the maximum sense voltage is controlled by
the voltage on the V_RNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
I_LIMIT
=
⎛ _VSNS(MAX)
⎜
⎝
R_DS(ON)
•
ρ_T
+
1
2
•
⎞
∆I_{L ⎟}
⎠
•2
The current limit value should be checked to ensure that
I_LIMIT(MIN) > I_OUT(MAX). The minimum value of current limit
generally occurs with the largest V_IN at the highest ambi-
ent temperature, conditions which cause the largest power
loss in the converter. Note that it is important to check for
3709fb
15