LTC3709_15 Datasheet, PDF(14/24 Page) Linear Technology – Fast 2-Phase, No RSENSE Synchronous DC/DC Controller with Tracking/Sequencing

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LTC3709_15 Datasheet, PDF (14/24 Pages) Linear Technology – Fast 2-Phase, No RSENSE Synchronous DC/DC Controller with Tracking/Sequencing

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LTC3709

APPLICATIO S I FOR ATIO

A reasonable starting point is to choose a ripple current

that is about 40% of IOUT(MAX)/2. Note that the largest

ripple current occurs at the highest VIN. To guarantee that

ripple current does not exceed a specified maximum, the

inductance should be chosen according to:

â¢

VOUT

âIL(MAX)

â1â

VOUT

VIN(MAX)

Once the value for L is known, the inductors must be

selected (based on the RMS saturation current ratings). A

variety of inductors designed for high current, low voltage

applications are available from manufacturers such as

Sumida, Toko and Panasonic.

Schottky Diode Selection

The Schottky diodes conduct during the dead time be-

tween the conduction of the power MOSFET switches. It is

intended to prevent the body diode of the bottom MOSFET

from turning on and storing charge during the dead time,

which causes a modest (about 1%) efficiency loss. The

diode can be rated for about one-half to one-fifth of the full

load current since it is on for only a fraction of the duty

cycle. In order for the diode to be effective, the inductance

between the diode and the bottom MOSFET must be as

small as possible, mandating that these components be

placed adjacently. The diode can be omitted if the effi-

ciency loss is tolerable.

CIN and COUT Selection

In continuous mode, the current of each top N-channel

MOSFET is a square wave of duty cycle VOUT/VIN. A low

ESR input capacitor sized for the maximum RMS current

must be used. The details of a close form equation can be

found in Application Note 77. Figure 2 shows the input

capacitor ripple current for a 2-phase configuration with

the output voltage fixed and input voltage varied. The input

ripple current is normalized against the DC output current.

The graph can be used in place of tedious calculations. The

minimum input ripple current can be achieved when the

input voltage is twice the output voltage.

In the Figure 2 graph, the local maximum input RMS

capacitor currents are reached when:

VOUT = 2k â 1 where k = 1, 2

VIN

These worst-case conditions are commonly used for

design because even significant deviations do not offer

much relief. Note that ripple current ratings from capacitor

manufacturers are often based on only 2000 hours of life

which makes it advisable to derate the capacitor. Several

capacitors may also be paralleled to meet size or height

requirements in the design. Always consult the capacitor

manufacturer if there is any question.

It is important to note that the efficiency loss is propor-

tional to the input RMS current squared and therefore a

2-stage implementation results in 75% less power loss

when compared to a single phase design. Battery/input

protection fuse resistance (if used), PC board trace and

connector resistance losses are also reduced by the re-

duction of the input ripple current in a 2-phase system. The

required amount of input capacitance is further reduced by

the factor 2 due to the effective increase in the frequency

of the current pulses.

0.6

0.5

0.4

1-PHASE

2-PHASE

0.3

0.2

0.1

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

DUTY FACTOR (VOUT/VIN)

3709 F02

Figure 2. RMS Input Current Comparison

3709fb

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