LTC3736-1 Datasheet, PDF (14/28 Pages) Linear Technology – Dual 2-Phase, No RSENSE Synchronous Controller with Spread Spectrum

LTC3736-1
APPLICATIO S I FOR ATIO
The typical LTC3736-1 application circuit is shown in
Figure 13. External component selection for each of the
LTC3736-1’s controllers is driven by the load requirement
and begins with the selection of the inductor (L) and the
power MOSFETs (MP and MN).
Power MOSFET Selection
Each of the LTC3736-1’s two controllers requires two
external power MOSFETs: a P-channel MOSFET for the
topside (main) switch and an N-channel MOSFET for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V_BR(DSS),
threshold voltage V_GS(TH), on-resistance R_DS(ON), reverse
transfer capacitance C_RSS, turn-off delay t_D(OFF) and the
total gate charge Q_G.
The gate drive voltage is the input supply voltage. Since the
LTC3736-1 is designed for operation down to low input
voltages, a sublogic level MOSFET (R_DS(ON) guaranteed at
V_GS = 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure
that the input supply to the LTC3736-1 is less than the
absolute maximum MOSFET V_GS rating, which is
typically 8V.
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average
output load current I_OUT(MAX) is equal to the peak inductor
current minus half the peak-to-peak ripple current I_RIPPLE.
The LTC3736-1’s current comparator monitors the drain-
to-source voltage V_DS of the P-channel MOSFET, which is
sensed between the SENSE⁺ and SW pins. The peak
inductor current is limited by the current threshold, set by
the voltage on the I_TH pin of the current comparator. The
voltage on the I_TH pin is internally clamped, which limits
the maximum current sense threshold ∆V_SENSE(MAX) to
approximately 125mV when IPRG is floating (85mV when
IPRG is tied low; 204mV when IPRG is tied high).
The output current that the LTC3736-1 can provide is
given by:
I_OUT(MAX)
=
∆V_SENSE(MAX)
R_DS(ON)
–
I_RIPPLE
2
A reasonable starting point is setting ripple current I_RIPPLE
to be 40% of I_OUT(MAX). Rearranging the above equation
yields:
R_DS(ON)(MAX)
=
5
6
•
∆V_SENSE(MAX)
I_OUT(MAX)
for Duty Cycle < 20%.
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of R_DS(ON) to provide the required
amount of load current:
R_DS(ON)(MAX)
=
5
6
•
SF
•
∆V_SENSE(MAX)
I_OUT(MAX)
where SF is a scale factor whose value is obtained from the
curve in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature.
The following equation is a good guide for determining the
required R_DS(ON)MAX at 25°C (manufacturer’s specifica-
tion), allowing some margin for variations in the
LTC3736-1 and external component values:
R_DS(ON)(MAX)
=
5
6
•
0.9
•
SF
•
∆V_SENSE(MAX)
I_OUT(MAX) • ρ_T
The ρ_T is a normalizing term accounting for the tempera-
ture variation in on-resistance, which is typically about
0.4%/°C, as shown in Figure 5. Junction to case tempera-
ture T_JC is about 10°C in most applications. For a maxi-
mum ambient temperature of 70°C, using ρ_80°C ~ 1.3 in
the above equation is a reasonable choice.
The power dissipated in the top and bottom MOSFETs
strongly depends on their respective duty cycles and load
current. When the LTC3736-1 is operating in continuous
mode, the duty cycles for the MOSFETs are:
Top P−ChannelDuty Cycle =
V_OUT
V_IN
BottomN−ChannelDuty Cycle =
V_IN – V_OUT
V_IN
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