LTC3866 Datasheet, PDF (11/36 Pages) Linear Technology – Current Mode Synchronous Controller for Sub Milliohm DCR Sensing

LTC3866
Operation
Main Control Loop
The LTC3866 uses LTC proprietary current sensing, current
mode step-down architecture. During normal operation, the
top MOSFET is turned on every cycle when the oscillator
sets the RS latch, and turned off when the main current
comparator, I_CMP , resets the RS latch. The peak inductor
current at which I_CMP resets the RS latch is controlled
by the voltage on the ITH pin, which is the output of the
error amplifier, EA. The remote sense amplifier (diffamp)
produces a signal equal to the differential voltage sensed
across the output capacitor divided down by the feedback
divider and re-references it to the local IC ground reference.
The V_FB pin receives this feedback signal and compares
it to the internal 0.6V reference. When the load current
increases, it causes a slight decrease in the V_FB pin voltage
relative to the 0.6V reference, which in turn causes the
ITH voltage to increase until the inductor’s average current
equals the new load current. After the top MOSFET has
turned off, the bottom MOSFET is turned on until either
the inductor current starts to reverse, as indicated by the
reverse current comparator, I_REV , or the beginning of the
next cycle.
The main control loop is shut down by pulling the RUN
pin low. Releasing RUN allows an internal 1.0µA current
source to pull up the RUN pin. When the RUN pin reaches
1.22V, the main control loop is enabled and the IC is
powered up. When the RUN pin is low, all functions are
kept in a controlled state.
Sensing Signal of Very Low DCR
The LTC3866 employs a unique architecture to enhance
the signal-to-noise ratio that enables it to operate with a
small sense signal of a very low value inductor DCR, 1mΩ
or less, to improve power efficiency, and reduce jitter due
to the switching noise which could corrupt the signal. The
LTC3866 can sense a DCR value as low as 0.2mΩ with
careful PCB layout.The LTC3866 comprises two positive
sense pins, SNSD⁺ and SNSA⁺, to acquire signals and
processes them internally to provide the response as
with a DCR sense signal that has a 14dB signal-to-noise
ratio improvement. In the meantime, the current limit
threshold is still a function of the inductor peak current
and its DCR value, and can be accurately set from 10mV
to 30mV in a 5mV steps with the ILIM pin. The filter time
constant, R1C1, of the SNSD⁺ should match the L/DCR
of the output inductor, while the filter at SNSA⁺ should
have a bandwidth of five times larger than SNSD⁺, R2C2
equals R1C1/5.
INTV_CC/EXTV_CC Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV_CC pin.
When the EXTV_CC pin is left open or tied to a voltage
less than 4.7V, an internal 5.5V linear regulator supplies
INTV_CC power from V_IN. If EXTV_CC is taken above 4.7V,
the 5.5V regulator is turned off and an internal switch is
turned on connecting EXTV_CC to INTV_CC. Using the EXTV_CC
pin allows the INTV_CC power to be derived from a high
efficiency external source such as a switching regulator
output. The top MOSFET driver is biased from the floating
bootstrap capacitor, C_B, which normally recharges dur-
ing the off cycle through an external diode when the top
MOSFET turns off. If the input voltage, V_IN, decreases to
a voltage close to V_OUT , the loop may enter dropout and
attempt to turn on the top MOSFET continuously. The
dropout detector detects this and forces the top MOSFET
off for about one-twelfth of the clock period plus 100ns
every third cycle to allow C_B to recharge. However, it is
recommended that a load be present or the IC operates
at low frequency during the dropout transition to ensure
C_B is recharged.
Internal Soft-Start
By default, the start-up of the output voltage is normally
controlled by an internal soft-start ramp. The internal
soft-start ramp connects to the noninverting input of the
error amplifier. The FB pin is regulated to the lower of the
error amplifier’s three noninverting inputs (the internal
soft-start ramp, the TK/SS pin or the internal 600mV ref-
erence). As the ramp voltage rises from 0V to 0.6V over
approximately 600µs, the output voltage rises smoothly
from its prebiased value to its final set value.
Certain applications can result in the start-up of the con-
verter into a non-zero load voltage, where residual charge
is stored on the output capacitor at the onset of converter
switching. In order to prevent the output from discharging
under these conditions, the bottom MOSFET is disabled
until soft-start is greater than V_FB.
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