LTC3300-2_15 Datasheet, PDF (10/42 Pages) Linear Technology – Addressable High Efficiency Bidirectional Multicell Battery Balancer

LTC3300-2
PIN FUNCTIONS
C1, C2, C3, C4, C5, C6 (Pins 24, 27, 30, 33, 36, 39):
C1 through C6 connect to the positive terminals of bat-
tery cells 1 through 6. Connect the negative terminal of
battery cell 1 to V^–.
BOOST⁺ (Pin 40): Boost⁺ Pin. Connects to the anode of
the external flying capacitor used for generating sufficient
gate drive necessary for balancing the topmost battery cell
in a given LTC3300-2 sub-stack. A Schottky diode from
C6 to BOOST⁺ is needed as well. Alternately, the BOOST⁺
pin can connect to one cell up in the above sub-stack (if
present). This pin is effectively C7. (Note: “Sub-stack” refers
to the 3-6 battery cells connected locally to an individual
LTC3300-2 as part of a larger stack.)
BOOST^– (Pin 41): Boost^– Pin. Connects to the cathode of
the external flying capacitor used for generating sufficient
gate drive necessary for balancing the topmost battery
cell in a given LTC3300-2 sub-stack. Alternately, if the
BOOST⁺ pin connects to the next higher cell in the above
sub-stack (if present), this pin is a no connect.
BOOST (Pin 42): Enable Boost Pin. Connect BOOST to V_REG
to enable the boosted gate drive needed for balancing the
top cell in a given LTC3300-2 sub-stack. If the BOOST⁺ pin
can be connected to the next cell up in the stack (i.e., C1
of the next LTC3300-2 in the stack), then BOOST should
be tied to V^– and BOOST^– no connected. This pin must
be tied to either V_REG or V^–.
A0, A1, A2, A3, A4 (Pins 43, 44, 45, 46, 47): Address
Inputs. The state of the address pins (V_REG = 1, V^– = 0)
determines the LTC3300-2 address. These pins must be
tied to either V_REG or V^–. See Serial Port in the Operation
section.
V_REG (Pin 48): Linear Voltage Regulator Output. This 4.8V
output should be bypassed with a 1µF or larger capacitor
to V^–. The V_REG pin is capable of supplying up to 40mA
to internal and external loads. The V_REG pin does not sink
current.
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