10321111 Datasheet, PDF (9/19 Pages) Lattice Semiconductor – High-Density Programmable Logic

Specifications ispLSI and pLSI 1032
Maximum GRP Delay vs GLB Loads
6
ispLSI and pLSI 1032-60
5
ispLSI and pLSI 1032-80
4
ispLSI and pLSI 1032-90
3
2
1
0
4
8
12
16
GLB Loads
0126A-80-32-isp
Power Consumption
Power consumption in the ispLSI and pLSI 1032 device used. Figure 3 shows the relationship between power
depends on two primary factors: the speed at which the and operating speed.
device is operating, and the number of Product Terms
Figure 3. Typical Device Power Consumption vs fmax
250
200
ispLSI and pLSI 1032
150
100
50
0 10 20 30 40 50 60 70 80
fmax (MHz)
Notes: Configuration of eight 16-bit Counters
Typical Current at 5V, 25˚C
ICC can be estimated for the ispLSI and pLSI 1032 using the following equation:
ICC = 52 + (# of PTs * 0.30) + (# of nets * Max. freq * 0.009) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of 2 GLB loads on
average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions and the
program in the device, the actual ICC should be verified.
0127A-32-80-isp
9
1996 ISP Encyclopedia