ICE40HX1K-VQ100 Datasheet, PDF (4/12 Pages) Lattice Semiconductor – iCE40™ HX-Series Ultra Low-Power FPGA Family

iCE40 HX-Series Ultra-Low Power Family
I/O Characteristics
Table 4: PIO Pin Electrical Characteristics
Symbol
Description
Conditions
Minimum Nominal Maximum
I_l
Input pin leakage current V_IN = VCCIO_max to 0 V
±10
I_OZ Three-state I/O pin (Hi-Z) V_O = VCCIO_max to 0 V
±10
leakage current
C_PIO PIO pin input capacitance
6
C_GBIN GBIN global buffer pin
6
input capacitance
R_PULLUP Internal PIO pull-up
VCCIO = 3.3V
60
resistance during
VCCIO = 2.5V
80
configuration
VCCIO = 1.8V
120
VCCIO = 1.5V
160
V_HYST Input hysteresis
VCCIO = 1.5V to 3.3V
50
NOTE: All characteristics are characterized and may or may not be tested on each pin on each device.
Units
µA
µA
pF
pF
kΩ
kΩ
kΩ
kΩ
mV
Single-ended I/O Characteristics
I/O Standard
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
Nominal I/O
Bank Supply
Voltage
3.3V
2.5V
1.8V
1.5V
Table 5: I/O Characteristics
Input Voltage (V)
V_IL
0.80
V_IH
2.00
0.70
1.70
35% VCCIO 65% VCCIO
35% VCCIO 65% VCCIO
Output Voltage (V)
V_OL
V_OH
0.4
2.40
0.4
2.00
0.4
1.40
0.4
1.20
Output Current at
Voltage (mA)
I_OL
I_OH
8
8
6
6
4
4
2
2
Lattice Semiconductor Corporation
www.latticesemi.com/
(1.32, 03-OCT-2012)
4