1032EA Datasheet, PDF (15/16 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Pin Configurations
ispLSI 1032EA 100-Pin TQFP Pinout Diagram
Specifications ispLSI 1032EA
2_NC
1
2_NC
2
I/O 57
3
I/O 58
4
I/O 59
5
I/O 60
6
I/O 61
7
I/O 62
8
I/O 63
9
IN 7
10
Y0
11
VCC
12
GND
13
VCCIO
14
RESET
15
TDI
16
I/O 0
17
I/O 1
18
I/O 2
19
I/O 3
20
I/O 4
21
I/O 5
22
I/O 6
23
2_NC
24
2_NC
25
ispLSI 1032EA
Top View
75
NC²
74
NC²
73
I/O 38
72
I/O 37
71
I/O 36
70
I/O 35
69
I/O 34
68
I/O 33
67
I/O 32
66
GOE 0/IN 4¹
65
Y1
64
VCC
63
GND
62
Y2
61
Y3
60
TCK
59
I/O 31
58
I/O 30
57
I/O 29
56
I/O 28
55
I/O 27
54
I/O 26
53
I/O 25
52
NC²
51
NC²
1. Pins have dual function capability which is software selectable.
2. NC pins are not to be connected to any active signal, VCC or GND.
100-TQFP/1032EA
15