1032EA Datasheet, PDF (13/16 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Maximum GRP Delay vs GLB Loads
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Specifications ispLSI 1032EA
ispLSI 1032EA-100
ispLSI 1032EA-125
ispLSI 1032EA-170
ispLSI 1032EA-200
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14
8
16
GLB Load
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GRP/GLB/1032EA
Power Consumption
Power consumption in the ispLSI 1032EA device de- used. Figure 4 shows the relationship between power
pends on two primary factors: the speed at which the and operating speed.
device is operating, and the number of product terms
Figure 4. Typical Device Power Consumption vs fmax
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ispLSI 1032EA
240
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200
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140
120
100
0
50 100 150 200 250
fmax (MHz)
Notes: Configuration of eight 16-bit counters
Typical current at 5V, 25°C
Icc can be estimated for the ispLSI 1032EA using the following equation:
Icc = 20mA + (# of PTs * .52) + (# of nets * Max Freq * .003)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The Icc estimate is based on typical conditions (Vcc = 5.0V, room temperature) and an assumption of four GLB
loads on average exists. These values are for estimates only. Since the value of Icc is sensitive to operating
conditions and the program in the device, the actual Icc should be verified.
0127/1032EA
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