GAL22V10 Datasheet, PDF (1/29 Pages) Lattice Semiconductor – High Performance E2CMOS PLD Generic Array Logic

Specificatio_Gns_AG_LA₂L₂22_VV₁1₀0
High Performance E²CMOS PLD
Generic Array Logic™
Features
Functional Block Diagram
• HIGH PERFORMANCE E²CMOS^® TECHNOLOGY
— 4 ns Maximum Propagation Delay
I/CLK
— Fmax = 250 MHz
— 3.5 ns Maximum from Clock Input to Data Output
— UltraMOS^® Advanced CMOS Technology
I
• ACTIVE PULL-UPS ON ALL PINS
I
• COMPATIBLE WITH STANDARD 22V10 DEVICES
— Fully Function/Fuse-Map/Parametric Compatible
with Bipolar and UVCMOS 22V10 Devices
I
RESET
8
OLMC
10
OLMC
12
OLMC
I/O/Q
I/O/Q
I/O/Q
• 50% to 75% REDUCTION IN POWER VERSUS BIPOLAR
— 90mA Typical Icc on Low Power Device
I
— 45mA Typical Icc on Quarter Power Device
14
OLMC
I/O/Q
• E² CELL TECHNOLOGY
I
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
I
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
I
— Maximum Flexibility for Complex Logic Designs
16
OLMC
16
OLMC
14
OLMC
I/O/Q
I/O/Q
I/O/Q
• PRELOAD AND POWER-ON RESET OF REGISTERS
I
— 100% Functional Testability
12
OLMC
I/O/Q
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
I
10
OLMC
I/O/Q
I
8
OLMC
I/O/Q
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
ESCRIPTION
Description
I
PRESET
Pin Configuration
The GAL22V10, at 4ns maximum propagation delay time, combines
a high performance CMOS process with Electrically Erasable (E²)
floating gate technology to provide the highest performance avail-
able of any 22V10 device on the market. CMOS circuitry allows
the GAL22V10 to consume much less power when compared to
bipolar 22V10 devices. E² technology offers high speed (<100ms)
erase times, providing the ability to reprogram or reconfigure the
device quickly and efficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. The GAL22V10 is fully function/fuse map/parametric com-
patible with standard bipolar and CMOS 22V10 devices.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lat-
tice Semiconductor delivers 100% field programmability and func-
tionality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
PLCC
4
I5
2
28
26
25 I/O/Q
I
I/O/Q
I7
NC
GAL22V10
23 I/O/Q
NC
I9
Top View
21 I/O/Q
I
I/O/Q
I 11
19 I/O/Q
12
14
16
18
DIP
I/CLK ¹
I
24 Vcc
I/O/Q
I
I/O/Q
I _GAL
I _22V10
I6
I/O/Q
I/O/Q
I/O/Q
I
18 I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
GND 12
13 I
Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. [phone]; 1-800-LATTICE; FAX [phone]; http://www.latticesemi.com
August 2000
22v10_06
1