IS61NLP12832B Datasheet, PDF (21/29 Pages) Integrated Silicon Solution, Inc – 128K x 32, 128K x 36, and 256K x 18 STATE BUS SRAM

IS61NLP12832B
 IS61NLP12836B/IS61NVP12836B
 _{IS 61NLP25618A/IS61NVP25618A}
SINGLE READ/WRITE CYCLE TIMING
CLK
CKE
tSE tHE
Address
A1
A2
A3
WRITE
CE
A4
A5
A6
A7
ADV
OE
Data Out
Data In
tOEQ
tOELZ
Q1
Q3
tDS tDH
D2
Q4
D5
NOTES: WRITE = L means WE = L and BWx = L
CE = L means CE1 = L, CE2 = H and CE2 = L
CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
tKH tKL
tKC
A8
A9
Q6
Q7
Don't Care
Undefined
Integrated Silicon Solution, Inc. — www.issi.com
21
Rev.  D
09/10/07