IS61NLP12832B Datasheet, PDF (14/29 Pages) Integrated Silicon Solution, Inc – 128K x 32, 128K x 36, and 256K x 18 STATE BUS SRAM

IS61NLP12832B
 IS61NLP12836B/IS61NVP12836B
 _{IS 61NLP25618A/IS61NVP25618A}
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
3.3V
2.5V
Min.
Max.
Min.
Max.
Unit
Voh
Output HIGH Voltage
Ioh = –4.0 mA  (3.3V)
2.4
—
2.0
—
V

Ioh = –1.0 mA  (2.5V)
Vol
Output LOW Voltage
Iol = 8.0 mA  (3.3V)
—
0.4
—
0.4
V

Iol = 1.0 mA  (2.5V)
Vih⁽¹⁾
Input HIGH Voltage
2.0 Vdd + 0.3
1.7 Vdd + 0.3
V
Vil⁽¹⁾
Input LOW Voltage
–0.3
0.8
–0.3
0.7
V
Ili
Input Leakage Current
Vss ≤ Vin ≤ Vdd⁽¹⁾
–5
5
–5
5
µA
Ilo
Output Leakage Current Vss ≤ Vout ≤ Vddq, OE = Vih
–5
5
–5
5
µA
Note:
1. Overshoot: Vih (AC) < Vdd + 2.0V (Pulse width less than tkc/2). Undershoot: Vil (AC) > -2V (Pulse width less than tkc/2).
POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
Test Conditions
Temp. range
-250
MAX
x18 x32/x36
-200
MAX
x18 x32/x36 Unit
Icc
AC Operating

Supply Current

Device Selected,
Com.
OE = Vih, ZZ ≤ Vil,
Ind.
All Inputs ≤ 0.2V or ≥ Vdd – 0.2V,
Cycle Time ≥ tkc min.
225 225
250 250
200 200
mA
210 210
Isb
Standby Current
TTL Input


Device Deselected,
Vdd = Max.,
All Inputs ≤ Vil or ≥ Vih,
ZZ ≤ Vil, f = Max.
Com.
Ind.
90 90
90 90
mA
100 100
100 100
Isbi
Standby Current
CMOS Input
Device Deselected,
Vdd = Max.,
Vin ≤ Vss + 0.2V or ≥Vdd – 0.2V
Com.
Ind.
typ.⁽²⁾
70 70
75 75
40
70 70 mA
75 75
f=0
Isb2
Sleep Mode
ZZ>Vih

Com.
30 30
Ind.
35 35
typ.⁽²⁾ 20
30 30 mA
35 35
Note:
1. MODE pin has an internal pullup and should be tied to Vdd or Vss. It exhibits ±100µA maximum leakage current when tied to ≤
Vss + 0.2V or ≥ Vdd – 0.2V.
2.Typical values are measured at Vdd = 3.3V, Ta = 25^oC and not 100% tested.
14
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  D
09/10/07