IS61NLP12832B Datasheet, PDF (20/29 Pages) Integrated Silicon Solution, Inc – 128K x 32, 128K x 36, and 256K x 18 STATE BUS SRAM

IS61NLP12832B
 IS61NLP12836B/IS61NVP12836B
 _{IS 61NLP25618A/IS61NVP25618A}
WRITE CYCLE TIMING
CLK
ADV
tKH tKL
tKC
Address
A1
A2
A3
WRITE
CKE
tSE tHE
CE
OE
Data In
D1-1
tOEHZ
Data Out
Q0-3
Q0-4
D2-1
D2-2
D2-3
D2-4
tDS
tDH
D3-1
D3-2
D3-3
D3-4
NOTES: WRITE = L means WE = L and BWx = L
WE = L and BWX = L
CE = L means CE1 = L, CE2 = H and CE2 = L
CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
Don't Care
Undefined
20
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  D
09/10/07