X28HC64_06 Datasheet, PDF (9/17 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPROM

X28HC64
SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
V_CC
0V
Data
ADDR
AAA
1555
55
0AAA
A0
1555
CE
≤t_{BLC MAX}
WE
Writes
OK
t_WC
Byte
or
Page
(V_CC)
Write
Protected
Figure 7. Write Sequence for Software
Data Protection
Write Data AA
to Address
1555
Write Data 55
to Address
0AAA
Write Data A0
to Address
1555
Write Data XX
to Any
Address
Write Last
Byte to
Last Address
Byte/Page
Load Enabled
Optional
Byte/Page
Load Operation
Regardless of whether the device has previously been
protected or not, once the software data protection
algorithm is used, the X28HC64 will automatically dis-
able further writes unless another command is issued
to deactivate it. If no further commands are issued the
X28HC64 will be write protected during power-down
and after any subsequent power-up.
Note: Once initiated, the sequence of write operations
should not be interrupted.
After t_WC
Re-Enters Data
Protected State
9
FN8109.1
June 7, 2006