X28HC64_06 Datasheet, PDF (1/17 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPROM

®
Data Sheet
June 7, 2006
X28HC64
64K, 8K x 8 Bit
FN8109.1
5 Volt, Byte Alterable EEPROM
FEATURES
• 70ns access time
• Simple byte and page write
—Single 5V supply
—No external high voltages or V_PP control circuits
— Self-timed
—No erase before write
—No complex programming algorithms
—No overerase problem
• Low power CMOS
—40mA active current max.
—200µA standby current max.
• Fast write cycle times
—64-byte page write operation
—Byte or page write cycle: 2ms typical
—Complete memory rewrite: 0.25 sec. typical
—Effective byte write cycle time: 32µs typical
• Software data protection
• End of write detection
—DATA polling
—Toggle bit
PIN CONFIGURATIONS
Plastic DIP
Flat Pack
CERDIP
SOIC
NC 1
28
V_CC
A₁₂
2
27 WE
A₇
3
26 NC
A₆
4
25 A₈
A₅
5
24 A₉
A₄
6
23
A₁₁
A₃ 7 X28HC64 22 OE
A₂
8
21
A₁₀
A₁
9
20 CE
A₀ 10
19 I/O₇
I/O₀ 11
18 I/O₆
I/O₁ 12
17 I/O₅
I/O₂ 13
16 I/O₄
V_SS
14
15 I/O₃
LCC
PLCC
4 3 2 1 32 31 30
A₆
5
29 A₈
A₅
6
28 A₉
A₄
7
27 _A11
A₃
8
A₂
9
X28HC64
(Top View)
A₁
10
26 NC
25 OE
24 A₁₀
A₀
11
23 CE
NC 12
22 I/O₇
I/O₀ 13
21 I/O₆
14 15 16 17 18 19 20
• High reliability
—Endurance: 1 million cycles
—Data retention: 100 years
• JEDEC approved byte-wide pin out
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X28HC64 is an 8K x 8 EEPROM, fabricated with
Intersil’s proprietary, high performance, floating gate
CMOS technology. Like all Intersil programmable non-
volatile memories, the X28HC64 is a 5V only device. It
features the JEDEC approved pinout for byte-wide
memories, compatible with industry standard RAMs.
The X28HC64 supports a 64-byte page write operation,
effectively providing a 32µs/byte write cycle, and
enabling the entire memory to be typically written in 0.25
seconds. The X28HC64 also features DATA Polling and
Toggle Bit Polling, two methods providing early end of
write detection. In addition, the X28HC64 includes a
user-optional software data protection mode that further
enhances Intersil’s hardware write protect capability.
Intersil EEPROMs are designed and tested for appli-
cations requiring extended endurance. Inherent data
retention is greater than 100 years.
A2
1
A1
2
A0
3
I/O ₀
4
I/O 1
5
I/O ₂
6
NC
7
VSS
8
NC
9
I/O ₃
10
I/O ₄
11
I/O ₅
12
I/O 6
13
I/O ₇
14
CE
15
A10
16
TSOP
X28HC64
PGA
I/O₁ I/O₂ I/O₃ I/O₅ I/O₆
12
13
15
17
18
I/O₀ A₀
11 10
V_SS I/O₄ I/O₇
14
16
19
A₁
A₂
CE
A ₁₀
9
8
20
21
X28HC64
A₃
7
A₄
6
(BOTT OM
OE
22
A₁₁
23
VIEW)
A₅
A₁₂
V_CC A₉
A₈
5
2
28
24
25
A₆
A₇
NC WE NC
4
3
1
27
26
Bottom View
32
A3
31
A4
30
A5
29
A6
28
A7
27
A ₁₂
26 NC
25
NC
24
VCC
23 NC
22 WE
21 NC
20 A 8
19 A 9
18
A11
17 OE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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