X28HC64_06 Datasheet, PDF (4/17 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPROM

X28HC64
PIN DESCRIPTIONS
Addresses (A₀-A₁₂)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all
read/write operations. When CE is HIGH, power con-
sumption is reduced.
Output Enable (OE)
The Output Enable input controls the data output buff-
ers and is used to initiate read operations.
PIN NAMES
Symbol
A₀-A₁₂
I/O₀-I/O₇
WE
CE
OE
V_CC
V_SS
NC
Data In/Data Out (I/O₀-I/O₇)
Data is written to or read from the X28HC64 through
the I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to
the X28HC64.
BLOCK DIAGRAM
A₀–A₁₂
Address
Inputs
X Buffers
Latches and
Decoder
Y Buffers
Latches
and
Decoder
65,536-Bit
EEPROM
Array
I/O Buffers
and Latches
CE
Control
OE
Logic and
WE
Timing
V_CC
V_SS
I/O₀–I/O₇
Data Inputs/Outputs
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
4
FN8109.1
June 7, 2006