X28HC64_06 Datasheet, PDF (7/17 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPROM

THE TOGGLE BIT I/O₆
Figure 4. Toggle Bit Bus Sequence
Last
WE Write
X28HC64
CE
OE
I/O₆
V_OH
*
V_OL
* Beginning and ending state of I/O₆ will vary.
Figure 5. Toggle Bit Software Flow
Last Write
Yes
Load Accum
From Addr N
Compare
Accum with
Addr N
HIGH Z
*
X28HC64
Ready
The Toggle Bit can eliminate the chore of saving and
fetching the last address and data in order to implement
DATA Polling. This can be especially helpful in an array
comprised of multiple X28HC64 memories that is fre-
quently updated. Toggle Bit Polling can also provide a
method for status checking in multiprocessor applica-
tions. The timing diagram in Figure 4 illustrates the
sequence of events on the bus. The software flow dia-
gram in Figure 5 illustrates a method for polling the
Toggle Bit.
Compare
No
Ok?
Yes
Ready
7
FN8109.1
June 7, 2006