X28HC64_06 Datasheet, PDF (8/17 Pages) Intersil Corporation – 5 Volt, Byte Alterable EEPROM

X28HC64
HARDWARE DATA PROTECTION
The X28HC64 provides two hardware features that
protect nonvolatile data from inadvertent writes.
– Default V_CC Sense—All write functions are inhibited
when V_CC is 3V typically.
– Write Inhibit—Holding either OE LOW, WE HIGH, or
CE HIGH will prevent an inadvertent write cycle dur-
ing power-up and power-down, maintaining data
integrity.
SOFTWARE DATA PROTECTION
The X28HC64 offers a software controlled data protec-
tion feature. The X28HC64 is shipped from Intersil with
the software data protection NOT ENABLED; that is,
the device will be in the standard operating mode. In
this mode data should be protected during power-up/-
down operations through the use of external circuits.
The host would then have open read and write access
of the device once V_CC was stable.
The X28HC64 can be automatically protected during
power-up and power-down without the need for exter-
nal circuits by employing the software data protection
feature. The internal software data protection circuit is
enabled after the first write operation utilizing the soft-
ware algorithm. This circuit is nonvolatile and will
remain set for the life of the device, unless the reset
command is issued.
Once the software protection is enabled, the X28HC64
is also protected from inadvertent and accidental
writes in the powered-up state. That is, the software
algorithm must be issued prior to writing additional
data to the device.
SOFTWARE ALGORITHM
Selecting the software data protection mode requires
the host system to precede data write operations by a
series of three write operations to three specific
addresses. Refer to Figure 6 and 7 for the sequence.
The three-byte sequence opens the page write window,
enabling the host to write from one to sixty-four bytes
of data. Once the page load cycle has been com-
pleted, the device will automatically be returned to the
data protected state.
8
FN8109.1
June 7, 2006