ISL6590 Datasheet, PDF(9/24 Page) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

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ISL6590 Datasheet, PDF (9/24 Pages) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

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ISL6590

VID Map

TABLE 1. VOLTAGE IDENTIFICATION (VID)

VOUT (V) VID5

0.8375

VID4

VID3

VID2

VID1

0.8500

0.8625

0.8750

0.8875

0.9000

0.9125

0.9250

0.9375

0.9500

0.9625

0.9750

0.9875

1.0000

1.0125

1.0250

1.0375

1.0500

1.0625

1.0750

1.0875

OFF

1.1000

1.1125

1.1250

1.1375

1.1500

1.1625

1.1750

1.1875

1.2000

VID0

VID

Control of the output voltage of the regulator is set from the

external six bit VID [5:0] input pins. After power-up, the VID

inputs are sampled and this value is used as the final output

voltage for the Soft Start process. After Soft Start is

complete, the internal VID setting may be changed by

modifying the external six bit VID [5:0] input pins or via the

host interface write to the internal VID register. To allow for

host interface control of VID requires that a separate register

is needed for the value of the external VID input pins. This is

needed to separately track changes to the VID set by the

host interface and the VID set from the external pins. The

same method of output voltage stepping that is used in the

Soft Start process is also applied to dynamic VID changes.

Custom VID

The ISL6590 has additional registers for a custom VID table

to be created and stored in memory locations 0940-097F.

VOUT (V) VID5

1.2125

1.2250

1.2375

1.2500

1.2625

1.2750

1.2875

1.3000

1.3125

1.3250

1.3375

1.3500

1.3625

1.3750

1.3875

1.4000

1.4125

1.4250

1.4375

1.4500

1.4625

1.4750

1.4875

1.5000

1.5125

1.5250

1.5375

1.5500

1.5625

1.5750

1.5875

1.6000

VID4

VID3

VID2

VID1

VID0

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