ISL6590 Datasheet, PDF (15/24 Pages) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

ISL6590
Loop Compensation
Any closed loop system must be designed to insure stability
(prevent oscillation) and provide correct response to external
events such as load transients. The output of a buck
regulator has an inherent, low pass filter formed by the
output inductor(s), output capacitance and their ESRs
(Equivalent Series Resistance). Figure 12 shows a typical
gain and phase plot of output inductors, capacitors and ESR.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
1
Plant Gain
Phase
10
100
1000
Frequency (in KHz)
0
-20
-40
-60
-80
-100
-120
-140
10000
FIGURE 12. FREQUENCY RESPONSE OF THE OUTPUT
INDUCTORS AND CAPACITORS
Above the resonant frequency of the output LC filter (10kHz
in this case) the gain falls at a rate of 40dB/decade and the
phase shift approaches –180 degrees. At a frequency
above the F = 1/(2πC*ESR) = 500kHz in this case) the gain
slope changes to –20dB/decade and the phase shift
approaches –90 degrees In a closed loop control system,
the output is subtracted from a reference voltage to produce
an error voltage. The error voltage is amplified and fed to
the output stage. In a buck regulator the output stage
consists of a Pulse Width Modulator (PWM), switching
transistors (typically MOSFETs), series inductor(s) and
output capacitors. High gain feedback reduces variation in
the output due to changes in input voltage, load current and
component values. However, high gain at high frequencies
can cause excessive over shoot in response to transients ( if
phase shift > 120 degrees and gain > 0dB ) or oscillation ( if
phase shift > 180 degrees and gain > 0dB ). The trade off in
designing the loop compensation is to achieve fast response
to transients without excessive overshoot or oscillation.
FIGURE 13. TYPICAL ANALOG VOLTAGE LOOP BLOCK
DIAGRAM
FIGURE 14. DIGITAL CONTROL LOOP BLOCK DIAGRAM
The ISL6580 subtracts a reference from the output voltage
to produce an error voltage. It converts the error voltage to a
6 bit digital number and sends it to the ISL6590 controller.
The controller processes the error number numerically to
provide gain (Proportional), phase lag (Integration) and
phase lead (Derivative) functions. This forms the digital PID
control.
FIGURE 15. TYPICAL ANALOG ERROR AMPLIFIER AND
COMPENSATION
15