ISL6590 Datasheet, PDF (12/24 Pages) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

ISL6590 Data Write Protocol
5 clocks
5 clocks
C LK
ISL6590
8 Clocks
DATA
Start
Addre s s :
De vi ce ID
Addre s s :
Re gi s te r
R/W Dead Ack Data Byte (to ISL6580) Dead Ack
Stop
Cycle (from
Cycle (from
ISL6580
ISL6580
)
)
FIGURE 8. ISL6590 WRITE PROTOCOL
ISL6590 Data Read Protocol
S C LK
5 clocks
5 clocks
8 Clocks
S DATA
Start Address: DeviceID Address: Register R/W Dead Ack Data Byte (from ISL6580) Dead Ack
St o p
Cycle (from
Cycle (from
ISL6580
)
ISL6580
)
FIGURE 9. ISL6590 READ PROTOCOL
12