ISL6590 Datasheet, PDF (11/24 Pages) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

ISL6590
the status register which then allows accesses to the Non-
Volatile Memory map.
ISL6590 Data Write Timing
Tp
SCLK
t DSU
t_DH
SDATA
t_KH
t_SPH
FIGURE 6. ISL6590 DATA WRITE TIMING
FIGURE 4. EEPROM DATA READ TIMING
TABLE 6. EEPROM DATA READ TIMING
TIMING NAME PARAMETER
MIN
UNITS
Data Setup
Data Hold
t_DSU
t_DH
20
ns
20
ns
TABLE 8. DATA WRITE TIMING
TIMING NAME PARAMETER TYPICAL
Data Setup
Data Hold
Kick Hold
Stop Hold
SCLK Period
t_DSU
t_DH
t_KH
t_SPH
t_p
45
15
15
15
62.5
ISL6590 Data Read Timing
UNITS
ns
ns
ns
ns
ns
FIGURE 5. EEPROM DATA WRITE TIMING
TABLE 7. EEPROM TIMING
TIMING NAME PARAMETER TYPICAL
CS to MCLK delay
t_CSSU
480
Data Setup
t_DSU
240
Data Hold
t_DH
240
Clock Period
t_P
480
MCLK to CS delay
t_CSH
720
UNITS
ns
ns
ns
ns
ns
Write-Through Cycles
During startup and local register loading, any incoming
writecycles to the Non-Volatile Memory will be held off until
start up and configuration is complete. During normal
operation, writes to the Non-Volatile Memory shall be
extended until such time that the data is both written to and
read back from the external EEPROM.
FIGURE 7. DATA READ TIMING
TABLE 9. DATA READ TIMING
TIMING NAME PARAMETER TYPICAL
Data Setup
Data Hold
t_DSU
52
t_DH
14
UNITS
ns
ns
11