ISL6590 Datasheet, PDF (20/24 Pages) Intersil Corporation – Digital Multi-Phase PWM Controller for Core-Voltage Regulation

ISL6590
TABLE 11. ISL6590 MEMORY MAP (Continued)
ADDRESS RANGE
020A
VID_IN_SOFT
020B
Alive Found
020D
Reserved
020E
VCODE_IN
020F
VCODE_OUT
0210
Enumeration Control
0211
Enumeration Done
0212
VID_IN (from VID pins)
0213
OUTEN (from OUTEN pin)
0214
PWRGD
0215
VID_OUT
0216
Voltage Error
0217
Average Peak Channel Current
0218
Overload
0219
AVP Offset
021A
Voltage Calibration Offset
021B
Regulated
021C – 21F
Reserved
0220
Peak Channel Current – Phase 1
0221
Peak Channel Current – Phase 2
0222
Peak Channel Current – Phase 3
0223
Peak Channel Current – Phase 4
0224
Peak Channel Current – Phase 5
0225
Peak Channel Current – Phase 6
0226
Peak Channel Current – Phase 7
0227
Peak Channel Current – Phase 8
0228 – 022F
Reserved
0230
On Time – Phase 1 (upper 8 bits)
0231
On Time – Phase 2 (upper 8 bits)
0232
On Time – Phase 3 (upper 8 bits)
0233
On Time – Phase 4 (upper 8 bits)
0234
On Time – Phase 5 (upper 8 bits)
0235
On Time – Phase 6 (upper 8 bits)
0236
On Time – Phase 7 (upper 8 bits)
0237
On Time – Phase 8 (upper 8 bits)
0238 – 02FF
Reserved
0300 - 03FF
Reserved
0400 – 07FF
Broadcast Write Memory Map
0400
Reserved
NAME
20
R/W/S
(NOTE 1)
R/W
R
SIZE
(BITS)
6
8
R
8
R/W
8
R/W
3
R
4
R
6
R
1
R
1
R
7
R
6
R
6
R
8
R
8
R/W
5
R
1
R
6
R
6
R
6
R
6
R
6
R
6
R
6
R
6
R
8
R
8
R
8
R
8
R
8
R
8
R
8
R
8
R/W/Ws¹ Size (bits)