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ISL6353_14 Datasheet, PDF (8/30 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12 DDR Memory Systems
ISL6353
Absolute Maximum Ratings
Supply Voltage, VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Input Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT-PHASE) . . . . . . . . . . . . . . . . -0.3V to +7V(DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +9V(<10ns)
Phase Voltage (PHASE) . . . . . . . . . . . . . . . . -7V (<20ns Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . . . . . . . . . . . . . PHASE - 0.3V (DC) to BOOT
. . . . . . . . . . . . . . . . . . . . . . . PHASE-5V (<20ns Pulse Width, 10µJ) to BOOT
LGATE Voltage (LGATE). . . . . . . . . . . . . . . . . . . . . . -0.3V (DC) to VDD + 0.3V
. . . . . . . . . . . . . . . . . . . . . . . -2.5V (<20ns Pulse Width, 5µJ) to VDD + 0.3V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD +0.3V)
Open Drain Outputs, PGOOD, VR_HOT#, ALERT#. . . . . . . . . . -0.3V to +7V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . 2000V
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Charged Device Model (Tested per JESD22-C101A) . . . . . . . . . . . 750V
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
40 Ld TQFN Package (Notes 4, 5) . . . . . . .
32
3
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage, VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to 25V
Ambient Temperature
ISL6353CRTZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ISL6353IRTZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Junction Temperature
ISL6353CRTZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +125°C
ISL6353IRTZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Operating Conditions: VDD = 5V, TA = 0°C to +70°C for ISL6353CRTZ and TA = -40°C to +85°C for ISL6353IRTZ,
fSW = 300kHz, unless otherwise noted. Boldface limits apply over the operating temperature range.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNITS
INPUT POWER SUPPLY
+5V Supply Current
IVDD
VR_ON = 1V
VR_ON = 0V
4
4.6 mA
1
µA
Input Supply Current
Power-On-Reset Threshold
SYSTEM AND REFERENCES
IVIN
PORr
PORf
PORr
PORf
VR_ON = 0V
VDD rising
VDD falling
VIN pin rising
VIN pin falling
1
µA
4.35 4.5 V
4.00 4.15
V
4.00 4.35 V
2.8 3.50
V
System Accuracy
CRTZ
No load; closed loop, active mode range
%Error (VCC_CORE) VID = 0.75V to 1.50V,
VID = 0.5V to 0.7375V
-0.5
+0.5 %
-8
8 mV
VID = 0.3V to 0.4875V
-15
15 mV
IRTZ
No load; closed loop, active mode range
%Error (VCC_CORE) VID = 0.75V to 1.50V,
VID = 0.5V to 0.7375V
-0.8
0.8 %
-10
10 mV
VID = 0.3V to 0.4875V
-18
18 mV
Maximum Output Voltage + Offset
VCC_CORE(max) VID = FFh
OFFSET = 7Fh
1.520+
V
0.635 =
2.155
Minimum Output Voltage
VCC_CORE(min) VID = 01h
OFFSET = 00h
0.25
V
8
September 15, 2011
FN6897.0