ISL6353_14 Datasheet, PDF (26/30 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12 DDR Memory Systems

ISL6353
VSET1 and VSET2 can be used to set the output voltage of the
regulator. Table 9 shows the available options. If VSET1 and VSET2
are connected to ground, the controller will refer only to the SVID
register setting to program the output voltage. If any other logic
combination is used on VSET1/2, the controller will ignore the
SVID register setting and program the output voltage based on
Table 8 for soft-start and steady state.
V_BOOT
from PROG2
(V)
1.5
1.5
1.5
1.5
1.35
1.35
1.35
1.35
1.2
1.2
1.2
1.2
0
0
0
0
TABLE 9. VSET1/2 PIN DEFINITION
VSET1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VSET2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
OUTPUT
VOLTAGE
SVID Setting
1.35V
1.6V
1.65V
SVID Setting
1.2V
1.4V
1.45V
SVID Setting
1.1V
1.25V
1.3V
SVID Setting
1.05V
1.55V
1.15V
The PSI pin can be used to set the power state of the regulator as
indicated on Table 10. If PSI is connected to ground the controller
will refer only to the SVID register contents to set the power state. If
PSI is pulled high, the controller will enter the PS2 state. If PSI is
connected to a high impedance, the controller will enter the PS1
state.
TABLE 10. PSI PIN DEFINITION
PSI
ADDRESS
0
Internal SVID Power State
High-Z
PS1
1
PS2
Supported Serial VID Data And Configuration
Registers
The controller supports the following data and configuration
registers.
TABLE 11. SUPPORTED DATA AND CONFIGURATION
REGISTERS
REGISTER
INDEX
NAME
DESCRIPTION
DEFAULT
VALUE
00h Vendor ID
Uniquely identifies the VR
12h
vendor. Assigned by Intel.
01h Product ID Uniquely identifies the VR
35h
product. Intersil assigns this
number.
02h Product
Revision
Uniquely identifies the revision
of the VR control IC. Intersil
assigns this data.
05h Protocol ID
Identifies which revision of SVID 01h
protocol the controller supports.
06h Capability
Identifies the SVID VR
81h
capabilities and which of the
optional telemetry registers are
supported.
10h Status_1
Data register read after ALERT# 00h
signal; indicating if a VR rail has
settled, has reached VRHOT
condition or has reached ICC
max.
11h Status_2
Data register showing Status_2 00h
communication.
12h Temperature Data register showing
00h
Zone
temperature zones that have
been entered.
15h IOUT
Data register showing output 00h
current information. The voltage
at the IMON pin is digitized and
stored in this register.
1Ch Status_2_
LastRead
This register contains a copy of 00h
the Status_2 data that was last
read with the GetReg (Status_2)
command.
21h ICC max
Data register containing the ICC Refer to
max the platform supports; set Table 6
at start-up by resistor on PROG1
pin. The platform design
engineer programs this value
during the design process.
Binary format in amps, for
example 100A = 64h.
24h SR-fast
Slew Rate Normal. The fastest 0Ah
slew rate the platform VR can
sustain. Binary format in
mV/µs. i.e. 0Ah = 10mV/µs.
25h SR-slow
Is 4x slower than normal. Binary 02h
format in mV/µs. i.e.
02h = 2.5mV/µs
26
September 15, 2011
FN6897.0