ISL6263 Datasheet, PDF (8/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator for IMVP-6+ Santa Rosa GPU Core

ISL6263
Electrical Specifications
These specifications apply for T_A = -10°C to +100°C, unless otherwise stated. All typical specifications
T_A = +25°C, VDD = 5V, PVCC = 5V. Boldface limits apply over the operating temperature range,
-10°C to +100°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNITS
VR_ON Input High
V_{VR_ONH}
2.3
-
-
V
AF_EN Input Low
V_{AF_ENL}
-
-
1
V
AF_EN Input High
V_{AF_ENH}
2.3
-
-
V
VR_ON Leakage
I_{VR_ONL} V_{VR_ON} = 0V
-1.0
0
-
µA
I_{VR_ONH} V_{VR_ON} = 3.3V
-
0
1.0
µA
AF_EN Leakage
I_{AF_ENL} V_{AF_EN} = 0V
-1.0
0
-
µA
I_{AF_ENH} V_{AF_EN} = 3.3V
-
0.45
1.0
µA
VID<4:0> Input Low
V_VIDL
-
-
0.3
V
VID<4:0> Input High
V_VIDH
0.7
-
-
V
FDE Input Low
V_FDEL
-
-
0.3
V
FDE Input High
V_FDEH
0.7
-
-
V
VID<4:0> Leakage
I_VIDL
V_VID = 0V
-1.0
0
-
µA
I_VIDH
V_VID = 1.0V
-
0.45
1.0
µA
FDE Leakage
I_FDEL
V_FDE = 0V
-1.0
0
-
µA
I_FDEH
V_FDE = 1.0V
-
0.45
1.0
µA
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Limits established by characterization and are not production tested.
8. Limits should be considered typical and are not production tested.
Functional Pin Descriptions
RBIAS (Pin 1) - Sets the internal 10µA current reference.
Connect a 150kΩ ±1% resistor from RBIAS to VSS.
SOFT (Pin 2) - Sets the output voltage slew-rate. Connect
an X5R or X7R ceramic capacitor from SOFT to VSS. The
SOFT pin is the non-inverting input of the error amplifier.
OCSET (Pin 3) - Sets the overcurrent threshold. Connect a
resistor from OCSET to VO.
VW (Pin 4) - Sets the static PWM switching frequency in
continuous conduction mode. Connect a resistor from VW to
COMP.
COMP (Pin 5) - Connects to the output of the control loop
error amplifier.
FB (Pin 6) - Connects to the inverting input of the control
loop error amplifier.
VDIFF (Pin 7) - Connects to the output of the VDIFF
differential-summing amplifier.
VSEN (Pin 8) - This is the V_{CC_SNS} input of the processor
socket Kelvin connection. Connects internally to one of two
non-inverting inputs of the VDIFF differential-summing
amplifier.
RTN (Pin 9) - This is the V_{SS_SNS} input of the processor
socket Kelvin connection. Connects internally to one of two
inverting inputs of the VDIFF differential-summing amplifier.
DROOP (Pin 10) - Connects to the output of the droop
differential amplifier and to one of two non-inverting inputs of
the VDIFF differential-summing amplifier.
DFB (Pin 11) - This is the feedback of the droop amplifier.
Connects internally to the inverting input of the droop
differential amplifier.
VO (Pin 12) - Connects to one of two inverting inputs of the
VDIFF differential-summing amplifier.
VSUM (Pin 13) - Connects to the non-inverting input of the
droop differential amplifier.
VIN (Pin 14) - Connects to the R³ PWM modulator providing
input voltage feed-forward. For optimum input voltage
transient response, connect near the drain of the high-side
MOSFETs.
VSS (Pin 15) - Analog ground.
VDD (Pin 16) - Input power supply for the IC. Connect to
+5VDC and decouple with at least a 1µF MLCC capacitor
from the VDD pin to the VSS pin.
8
FN9213.2
June 10, 2010