ISL6263 Datasheet, PDF (13/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator for IMVP-6+ Santa Rosa GPU Core

ISL6263
Adaptive shoot-through protection prevents the gate-driver
outputs from going high until the opposite gate-driver output
has fallen below approximately 1V. The UGATE turn-on
propagation delay t_PDRU and LGATE turn-on propagation
delay t_PDRL are found in the Electrical Specifications table.
The power for the LGATE gate-driver is sourced directly from
the PVCC pin. The power for the UGATE gate-driver is
sourced from a boot-strap capacitor connected across the
BOOT and PHASE pins. The boot capacitor is charged from
PVCC through an internal boot-strap diode each time the
low-side MOSFET turns on, pulling the PHASE pin low.
PWM
LGATE
1V
UGATE
1V
t _PDRU
t _PDRL
FIGURE 6. GATE DRIVER TIMING DIAGRAM
Internal Bootstrap Diode
The ISL6263 has an integrated boot-strap Schottky diode
connected from the PVCC pin to the BOOT pin. Simply
adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Q_GATE = 100nC
0.4
0.2 _20nC
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ΔV_{BOOT_CAP} (V)
FIGURE 7. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
VOLTAGE
The minimum value of the bootstrap capacitor can be
calculated from Equation 2:
C_B
O
O
T
≥
---^Q----^G-----^A----^T---^E----
ΔV_BOOT
(EQ. 2)
where Q_GATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The ΔV_BOOT term is
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge, Q_GATE, of 25nC at 5V and also assume the droop in
the drive voltage at the end of a PWM cycle is 200mV. One
will find that a bootstrap capacitance of at least 0.125µF is
required. The next larger standard value capacitance is
0.15µF. A good quality ceramic capacitor is recommended.
Soft-Start and Soft Dynamic VID Slew Rates
The output voltage of the converter tracks V_SOFT, the
voltage across the SOFT and VSS pins. Shown in Figure 1,
the SOFT pin is connected to the output of the VID DAC
through the unidirectional soft-start current source I_SS or the
bidirectional soft-dynamic VID current source I_DVID, and the
non-inverting input of the error amplifier. Current is sourced
from the SOFT pin when I_SS is active. The SOFT pin can
both source and sink current when I_DVID is active. The
soft-start capacitor C_SOFT changes voltage at a rate
proportional to I_SS or I_DVID. The ISL6263 automatically
selects I_SS for the soft-start sequence so that the inrush
current through the output capacitors is maintained below
the OCP threshold. Once soft-start has completed, I_DVID is
automatically selected for output voltage changes
commanded by the VID inputs, charging C_SOFT when the
output voltage is commanded to rise, and discharging
C_SOFT when the output voltage is commanded to fall.
The IMVP-6+ Render Voltage Regulator specification
requires a minimum of 10mV/µs for SLEWRATE_GFX. The
value for C_SOFT must guarantee the minimum slew-rate of
10mV/µs when the soft-dynamic VID current source I_DVID is
the minimum specified value in the Electrical Specifications
table. The value of C_SOFT, can be calculated from
Equation 3:
C_SOFT
=
-^I-^D-----^V---^I--^D-----^m----ⁱ--ⁿ- =
⎛
⎝
-¹---⁰-_μ---^m-_s----^V-- _⎠⎞
1_----7_---5_----μ_----A_--
10 K
=
0.0175 μ F
(EQ. 3)
Choosing the next lower standard component value of
0.015µF will guarantee 10mV/µs SLEWRATE_GFX. This
choice of C_SOFT controls the startup slew-rate as well. One
should expect the output voltage during soft-start to slew to
the voltage commanded by the VID settings at a nominal
rate given by Equation 4:
d_----V_{-----S---O-----F----T-}
dt
=
------^I--^S----^S-------
C_SOFT
=
-----⁴---¹----^μ----^A------
0.015 μ F
≈
2_----._--8_---m_------V_--
μs
(EQ. 4)
Note that the slewrate is the average rate of change
between the initial and final voltage values. The slewrate is
moderated as V_CCGFX approaches the voltage commanded
by the VID inputs.
13
FN9213.2
June 10, 2010