ISL75052SEH Datasheet, PDF (7/16 Pages) Intersil Corporation – 1.5A, Rad Hard, Positive, High Voltage LDO

ISL75052SEH
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the following specified conditions:
V_IN = V_OUT + 0.5V, V_OUT = 4.0V, C_IN = C_OUT = 2x100µF 60mΩ, KEMET type T541X107N025AH or equivalent, T_J = +25°C, I_L = 0A. Applications must follow
thermal guidelines of the package to determine worst case junction temperature. Please refer to “Applications Information” on page 7 of the data sheet
and Tech Brief TB379. Boldface limits apply over the operating temperature range, -55°C to +125°C. Pulse load techniques used by ATE to ensure T_J = T_A
defines guaranteed limits. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 8) TYP (Note 8) UNITS
DEVICE START-UP CHARACTERISTICS
Enable Pin Characteristics
Turn-on Threshold
Enable Pin Leakage Current
Enable Pin Propagation Delay (EN
step 1.2V to V_OUT = 100mV)
Enable Pin Turn-on Delay
(EN step 1.2V to PGOOD)
Enable Pin Turn-on Delay
(EN step 1.2V to PGOOD)
Hysteresis (Falling Threshold)
PG Pin Characteristics
4.0V < V_IN < 13.2V
V_IN = 13.2V, EN = 5.5V
V_IN = 4.5V, V_OUT = 4.0V, I_LOAD = 1.5A,
C_OUT = 22µF, C_BYP = 0.2µF
V_IN = 4.5V, V_OUT = 4.0V, I_LOAD = 1.5A,
C_OUT = 2x100µF, C_BYP = 0.2µF
V_IN = 4.5V, V_OUT = 4.0V, I_LOAD = 1.5A,
C_OUT = 22µF, C_BYP = 0.2µF
4.0V < V_IN < 13.2V
0.5 0.8 1.2
V
1
µA
0.5 1.0
ms
1.4 3.0
ms
1.1 2.5
ms
75 170
mV
V_OUT Error Flag Rising Threshold
83
88
94
%V_OUT
V_OUT Error Flag Falling Threshold
80
86
91
%V_OUT
V_OUT Error Flag Hysteresis
1.75 2.5
%V_OUT
Error Flag Low Voltage
I_SINK = 1mA
5
100
mV
Error Flag Low Voltage
I_SINK = 10mA
5
400
mV
Error Flag Leakage Current
V_IN = 13.2V, PG = 5.5V
1
µA
8. Parameters with bold face MIN and/or MAX limits are 100% tested at -55°C, 25°C and 125°C.
9. Limits established by characterization and are not production tested.
10. Dropout is defined by the difference in supply V_IN and V_OUT when the supply produces a 2% drop in V_OUT from its nominal value.
11. Refer to thermal package guidelines in “Bottom Metal Mounting Guidelines” on page 8..
12. OCP recovery overshoot should be within ±4% of the nominal VOUT setpoint.
13. SET performance of <±5% at LET = 86MeV.cm2/mg has been evaluated at V_OUT = >2.5V with C_IN = C_OUT = 2x100µF 10V 60mΩ in parallel with
0.1µF CDR04 X7R capacitor. Capacitor on BYP = 0.1µF CDR04 X7R.
Applications Information
Input Voltage Requirements
This RH LDO will work from a V_IN in the range of 4.0V to 13.2V.
The input supply can have a tolerance of as much as ±10% for
conditions noted in the specification table. The minimum
guaranteed input voltage is 4.0V. However, due to the nature of
an LDO, V_IN must be some margin higher than the output voltage
plus dropout at the maximum rated current of the application if
active filtering (PSRR) is expected from V_IN to V_OUT. The Dropout
spec of this family of LDOs has been generously specified in
order to allow design for efficient operation.
External Capacitor Requirements
GENERAL GUIDELINE
External capacitors are required for proper operation. Careful
attention must be paid to layout guidelines and selection of
capacitor type and value to ensure optimal performance.
OUTPUT CAPACITOR
It is recommended to use a combination of Tantalum and
Ceramic capacitors to achieve a good volume to capacitance
ratio. The recommended combination is a 2x100µF 60mΩ rated,
KEMET T541 series tantalum capacitor, in parallel with a 0.1µF
MIL-PRF-49470 ceramic capacitor to be connected to V_OUT and
Ground pins of the LDO with PCB traces no longer than 0.5cm.
INPUT CAPACITOR
It is recommended to use a combination of Tantalum and
Ceramic capacitors to achieve a good capacitance to volume
ratio. The recommended combination is a 2x100µF 60mΩ rated,
KEMET T541 series tantalum capacitor in parallel with a 0.1µF
MIL-PRF-49470 ceramic capacitor to be connected to V_IN and
Ground pins of the LDO with PCB traces no longer than 0.5cm.
Current Limit Protection
The RH LDO incorporates protection against overcurrent due to
any short or overload condition applied to the output pin. The
current limit circuit performs as a constant current source when
the output current exceeds the current limit threshold which can
be adjusted by means of a resistor connected between the OCP
7
FN8456.0
May 29, 2013