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ISL75052SEH Datasheet, PDF (14/16 Pages) Intersil Corporation – 1.5A, Rad Hard, Positive, High Voltage LDO
ISL75052SEH
Metallization Mask Layout
TABLE 1. DIE LAYOUT X-Y COORDINATES
PAD
X
PIN
Y
DX
DY NAME PIN#
1
1019 1021 185
450 VOUT
1,2
2
1249 390
185
449 VOUT
1,2
3
2764 1354 5508 2689 VIN 3,4,5
4
3070 1030 185
450
VIN 3,4,5
5
3300 399
185
450
VIN 3,4,5
6
5037 256
185
185
OCP
8
7
5253 1635 185
185 VCCX
9
8
5099 2436 185
185
PG
10
9
4635 2436 185
185 TMODE 11
10
3824 2436 185
185 COMP
12
11
2840 1660 185
450
VIN 3,4,5
12
1799 2436 185
185
GND
13
13
668 2436 185
185
EN
14
14
168 2381 185
185
ADJ
15
15
168 1972 185
184
BYP
16
16
789 1652 185
450 VOUT
1,2
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
FN8456.0
May 29, 2013