ISL6265 Datasheet, PDF (6/24 Pages) Intersil Corporation – Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable

ISL6265
Absolute Maximum Ratings
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . . . . . -0.3 - +7V
Battery Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT-PHASE). . . . . . . . -0.3V to +7V(DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +9V (<10ns)
Phase Voltage (PHASE) . . . . . . . . . -7V (<20ns Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . . . PHASE -0.3V (DC) to BOOT
LGATE Voltage (LGATE) . . . . . . . . . . . . . -0.3V (DC) to VCC + 0.3V
ALL Other Pins. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Open Drain Outputs, PGOOD . . . . . . . . . . . . . . . . . . . . . -0.3 - +7V
Thermal Information
Thermal Resistance (Typical, Notes 1, 2) θ_JA (°C/W) θ_JC (°C/W)
TQFN Package . . . . . . . . . . . . . . . . . .
30
1.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V to 24V
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
2. For θ_JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
VCC = PVCC = 5V, V_IN = 12V, T_A = -10°C to +100°C; Parameters with MIN and/or MAX limits are 100% tested
at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production
tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
INPUT POWER SUPPLY
+5V Supply Current
I_VCC
EN = 3.3V
EN = 0V
-
7.8 10 mA
-
-
1
µA
POR (Power-On Reset) Threshold
VCC POR_r V_CC Rising
VCC POR_f V_CC Falling
- 4.35 4.5
V
3.9 4.1
-
V
Battery Supply Current (VIN)
SYSTEM AND REFERENCES
System Accuracy
(V_core0, V_core1, V_{core_NB})
RBIAS Voltage
Maximum Output Voltage (Note 3)
Minimum Output Voltage (Note 3)
CHANNEL FREQUENCY
Nominal CORE Switching Frequency
Nominal NB Switching Frequency
Core Frequency Adjustment Range
NB Frequency Adjustment Range
AMPLIFIERS (Note 3)
Error Amp DC Gain
Error Amp Gain-Bandwidth Product
Error Amp Slew Rate
I_VIN
EN = 0V, VIN = 24V
-
-
1
µA
%Error No load, closed loop, active mode VID = 0.75V to 1.55V -0.5
-
0.5
%
(V_CORE) _{VID = 0.50V to 0.7375V}
-5
-
+5 mV
R_RBIAS
V_COREx
(max)
R_RBIAS = 117kΩ
SVID = [000_0000b]
1.15 1.17 1.19 V
- 1.55 -
V
V_COREx
(min)
SVID = [101_0100b]
- 0.500 -
V
f_{SW_core0} VIN = 15.5V, V_DAC = 1.55V, V_FB0 = 1.60V,
285 300 315 kHz
force V_{comp_0} = 2V, R_VW = 6.81kΩ, 2-Phase Operation
f_{SW_core_NB} R_{FSET_NB} = 22.1kΩ, C_{FSET_NB} = 1nF, V_DAC = 0.5V,
V_{sen_nb} = 0.51V
285 300 315 kHz
200
-
500 kHz
200
-
500 kHz
A_V0
GBW
SR
C_L = 20pF
C_L = 20pF
-
90
-
dB
-
18
- MHz
-
5.0
- V/µs
6
FN6599.1
May 13, 2009