ISL6265 Datasheet, PDF (21/24 Pages) Intersil Corporation – Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable

ISL6265
0.60
0.55
0.50
I_P-P,N = 1
I_P-P,N = 0.50
I_P-P,N = 0.75
0.45
0.40
0.35
I_P-P,N = 0
0.30
0.25
I_P-P,N = 0.25
0.20
0.15
0.10
0.05
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DUTY CYCLE (V_IN/V_O)
FIGURE 11. NORMALIZED RMS INPUT CURRENT FOR
SINGLE PHASE CONVERTER
The normalized RMS current calculation is written as
Equation 22:
I_{IN_RMS, N} =
D
⋅
(1
–
D)
+
⎛
⎝
1^--D--2^{--⎠⎞}
⋅
I_PP
2
,N
(EQ. 22)
Where:
- I_MAX is the maximum continuous I_LOAD of the converter
- I_PP,N is the ratio of inductor peak-to-peak ripple current
to I_MAX
- D is the duty cycle that is adjusted to take into account
the efficiency of the converter which is written as:
D
=
-----^V-----^O-------
V_IN ⋅ η
(EQ. 23)
- where η is converter efficiency
Figure 12 provides the same input RMS current information
for two-phase designs.
0.3
0.2
0.1 ^IP-P,N ^{= 0.75}
I_P-P,N = 0.5
I_P-P,N = 0
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V_IN/V_O)
FIGURE 12. NORMALIZED RMS INPUT CURRENT FOR
2-PHASE CONVERTER
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
MOSFET Selection and Considerations
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct, the switching
frequency, the capability of the MOSFETs to dissipate heat,
and the availability and nature of heat sinking and air flow.
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating. The
MOSFETs used in the power stage of the converter should
have a maximum V_DS rating that exceeds the sum of the
upper voltage tolerance of the input power source and the
voltage spike that occurs when the MOSFETs switch.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred
high-side MOSFET emphasizes low gate charge so that the
device spends the least amount of time dissipating power in
the linear region. The preferred low-side MOSFET
emphasizes low r _DS(ON) when fully saturated to minimize
conduction loss.
For the low-side (LS) MOSFET, the power loss can be
assumed to be conductive only and is written as Equation 24:
P_{CON_LS} ≈ I_LOAD2 ⋅ r_{DS(ON)_LS} • (1 – D)
(EQ. 24)
For the high-side (HS) MOSFET, the its conduction loss is
written as Equation 25:
P_{CON_HS}
=
I_L
O
A
2
D
•
r_D
S
(
O
N
)
_
H
S
•
D
(EQ. 25)
For the high-side MOSFET, the switching loss is written as
Equation 26:
P_{SW_HS}
=
V_{-----I--N----}•_---I_{--V----A----L---L---E----Y-----}•_--t_{--O-----N----}•_---f_{--S----W--- + -}V_----I--N----•_---I_{--P----E----A----K----}•_---t_{--O----F----F----}•_---f_-S----W----
2
2
(EQ. 26)
Where:
- I_VALLEY is the difference of the DC component of the
inductor current minus 1/2 of the inductor ripple current
- I_PEAK is the sum of the DC component of the inductor
current plus 1/2 of the inductor ripple current
- t_ON is the time required to drive the device into
saturation
- t_OFF is the time required to drive the device into cut-off
Selecting The Bootstrap Capacitor
All three integrated drivers feature an internal bootstrap
schottky diode. Simply adding an external capacitor across
the BOOT and PHASE pins completes the bootstrap circuit.
The bootstrap function is also designed to prevent the
bootstrap capacitor from overcharging due to the large
negative swing at the PHASE node. This reduces voltage
stress on the BOOT and PHASE pins.
21
FN6599.1
May 13, 2009